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authorJagan Teki <jagan@amarulasolutions.com>2019-03-28 13:46:11 +0530
committerJagan Teki <jagan@amarulasolutions.com>2019-04-01 21:45:15 +0530
commit9d1e136734b80414c803301d69d4cd358001be93 (patch)
tree2783b677af0b1f789ae0a69854ec8ea4168e54fc
parent48cf0d8c6d261f543bff12046a366ec3b832937d (diff)
clk: sunxi: a10: Add CLK_AHB_GMAC
CLK_AHB_GMAC was suppose to be part of previous commit "clk: sunxi: Implement A10 EMAC clocks" add it so-that we can get rid of sunxi_set_gate warning on boot message. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
-rw-r--r--drivers/clk/sunxi/clk_a10.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c
index 15ffe5ecb3..7a96d1708e 100644
--- a/drivers/clk/sunxi/clk_a10.c
+++ b/drivers/clk/sunxi/clk_a10.c
@@ -28,6 +28,8 @@ static struct ccu_clk_gate a10_gates[] = {
[CLK_AHB_SPI2] = GATE(0x060, BIT(22)),
[CLK_AHB_SPI3] = GATE(0x060, BIT(23)),
+ [CLK_AHB_GMAC] = GATE(0x064, BIT(17)),
+
[CLK_APB1_UART0] = GATE(0x06c, BIT(16)),
[CLK_APB1_UART1] = GATE(0x06c, BIT(17)),
[CLK_APB1_UART2] = GATE(0x06c, BIT(18)),