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authorMarek Vasut <marex@denx.de>2018-08-21 15:54:22 +0200
committerMarek Vasut <marex@denx.de>2018-08-24 12:05:21 +0200
commita029f540c54c39847c329fc70b1b2e0ab6dedbcd (patch)
tree18eaaead4822f22b3381495277a79e0567f868fc
parentb67f80148e6961dce00b36fc043962aa2a140fac (diff)
ARM: dts: socfpga: Add missing NAND reset
The NAND reset is missing from DT, so the reset manager cannot unreset the NAND. Add the missing DT reset entry. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Ley Foon Tan <ley.foon.tan@intel.com>
-rw-r--r--arch/arm/dts/socfpga_arria10.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi
index 573974be04..46f2fd4b69 100644
--- a/arch/arm/dts/socfpga_arria10.dtsi
+++ b/arch/arm/dts/socfpga_arria10.dtsi
@@ -673,6 +673,7 @@
interrupts = <0 99 4>;
dma-mask = <0xffffffff>;
clocks = <&nand_clk>;
+ resets = <&rst NAND_RESET>;
status = "disabled";
};