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authorJagan Teki <jteki@openedev.com>2015-09-08 01:38:50 +0530
committerJagan Teki <jteki@openedev.com>2015-10-11 16:43:06 +0530
commita22bba81e40959c3675b794422508911034049d4 (patch)
tree51912be6eddac4873c6d7a4fcefeb60384e3155b
parentd5f60737dbaac82f3f7d49eb03ece443beb70fc8 (diff)
spi: zynq_spi: Fix to configure CPOL, CPHA mask
priv->mode is initialized when .set_speed triggers with mode value, so checking mode for configuring CPOL, CPHA using priv->mode is invalid hence use mode from .set_speed argument, and at the end priv->mode will initialized with mode. This patch also replaces formatting string to use speed instead of mode in .set_speed ops. Signed-off-by: Jagan Teki <jteki@openedev.com>
-rw-r--r--drivers/spi/zynq_spi.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index 310fb69c8d..d370e495cd 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -272,7 +272,8 @@ static int zynq_spi_set_speed(struct udevice *bus, uint speed)
writel(confr, &regs->cr);
priv->freq = speed;
- debug("zynq_spi_set_speed: regs=%p, mode=%d\n", priv->regs, priv->freq);
+ debug("zynq_spi_set_speed: regs=%p, speed=%d\n",
+ priv->regs, priv->freq);
return 0;
}
@@ -287,9 +288,9 @@ static int zynq_spi_set_mode(struct udevice *bus, uint mode)
confr = readl(&regs->cr);
confr &= ~(ZYNQ_SPI_CR_CPHA_MASK | ZYNQ_SPI_CR_CPOL_MASK);
- if (priv->mode & SPI_CPHA)
+ if (mode & SPI_CPHA)
confr |= ZYNQ_SPI_CR_CPHA_MASK;
- if (priv->mode & SPI_CPOL)
+ if (mode & SPI_CPOL)
confr |= ZYNQ_SPI_CR_CPOL_MASK;
writel(confr, &regs->cr);