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authorTom Rini <trini@konsulko.com>2019-01-22 17:09:24 -0500
committerTom Rini <trini@konsulko.com>2019-01-26 22:55:53 -0500
commita6d6812a212cf2ac263b23e68e6cbf719e64ac20 (patch)
tree98e84a0687c1adfdf5b2b18916a55dbcf768c526
parent0da90255083681a02b24528f80da9d4062ff634a (diff)
PowerPC: Stop re-using CONFIG_SPL_TEXT_BASE for TPL
Rather than checking for CONFIG_TPL_BUILD and then re-defining CONFIG_SPL_TEXT_BASE make use of CONFIG_TPL_TEXT_BASE directly. Cc: York Sun <york.sun@nxp.com> Cc: Po Liu <po.liu@nxp.com> Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: Timur Tabi <timur@tabi.org> Signed-off-by: Tom Rini <trini@konsulko.com>
-rw-r--r--arch/powerpc/cpu/mpc85xx/u-boot-spl.lds4
-rw-r--r--include/configs/C29XPCIE.h6
-rw-r--r--include/configs/P1010RDB.h6
-rw-r--r--include/configs/P1022DS.h6
-rw-r--r--include/configs/p1_p2_rdb_pc.h6
-rw-r--r--scripts/Makefile.spl7
6 files changed, 21 insertions, 14 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index 6dc8d9913b..bd0eeb1042 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -18,7 +18,11 @@ PHDRS
#endif
SECTIONS
{
+#ifdef CONFIG_TPL_BUILD
+ . = CONFIG_TPL_TEXT_BASE;
+#else
. = CONFIG_SPL_TEXT_BASE;
+#endif
.text : {
*(.text*)
}
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index caeb34cf0a..ebf44b5529 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -23,7 +23,7 @@
#define CONFIG_TPL_DRIVERS_MISC_SUPPORT
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SPL_MAX_SIZE (128 << 10)
-#define CONFIG_SPL_TEXT_BASE 0xf8f81000
+#define CONFIG_TPL_TEXT_BASE 0xf8f81000
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000)
@@ -50,7 +50,9 @@
#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
#endif
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SYS_MONITOR_BASE CONFIG_TPL_TEXT_BASE
+#elif defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
#else
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 18f70f04af..134ffe5271 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -78,7 +78,7 @@
#define CONFIG_SPL_NAND_INIT
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SPL_MAX_SIZE (128 << 10)
-#define CONFIG_SPL_TEXT_BASE 0xD0001000
+#define CONFIG_TPL_TEXT_BASE 0xD0001000
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000)
@@ -111,7 +111,9 @@
#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
#endif
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SYS_MONITOR_BASE CONFIG_TPL_TEXT_BASE
+#elif defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
#else
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index eeb19a9fa6..3ccfeca890 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -58,7 +58,7 @@
#define CONFIG_SPL_NAND_INIT
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SPL_MAX_SIZE (128 << 10)
-#define CONFIG_SPL_TEXT_BASE 0xf8f81000
+#define CONFIG_TPL_TEXT_BASE 0xf8f81000
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000)
@@ -213,7 +213,9 @@
#define CONFIG_SYS_MAX_FLASH_SECT 1024
#ifndef CONFIG_SYS_MONITOR_BASE
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SYS_MONITOR_BASE CONFIG_TPL_TEXT_BASE
+#elif defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
#else
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 459ecf328f..0e1f9836a6 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -178,7 +178,7 @@
#define CONFIG_SPL_NAND_INIT
#define CONFIG_SPL_COMMON_INIT_DDR
#define CONFIG_SPL_MAX_SIZE (128 << 10)
-#define CONFIG_SPL_TEXT_BASE 0xf8f81000
+#define CONFIG_TPL_TEXT_BASE 0xf8f81000
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10)
#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000)
@@ -207,7 +207,9 @@
#endif
#ifndef CONFIG_SYS_MONITOR_BASE
-#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SYS_MONITOR_BASE CONFIG_TPL_TEXT_BASE
+#elif defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
#else
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index e5b604e2d2..24ee927c72 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -321,14 +321,9 @@ LDFLAGS_$(SPL_BIN) += -T u-boot-spl.lds $(LDFLAGS_FINAL)
# Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
LDFLAGS_$(SPL_BIN) += $(call ld-option, --no-dynamic-linker)
-# First try the best-match (i.e. SPL_TEXT_BASE for SPL, TPL_TEXT_BASE for TPL)
+# Pick the best-match (i.e. SPL_TEXT_BASE for SPL, TPL_TEXT_BASE for TPL)
ifneq ($(CONFIG_$(SPL_TPL_)TEXT_BASE),)
LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_$(SPL_TPL_)TEXT_BASE)
-else
-# And then fall back to just testing for SPL_TEXT_BASE, even if in TPL mode
-ifneq ($(CONFIG_SPL_TEXT_BASE),)
-LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_SPL_TEXT_BASE)
-endif
endif
ifdef CONFIG_TARGET_SOCFPGA_ARRIA10