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author | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-11-22 19:45:04 +0100 |
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committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-11-26 00:39:08 +0100 |
commit | a8ee98df183ed240afb5220c3cdf2991f69fa578 (patch) | |
tree | 1d46690e29a9b434b02211adbb647f5fa7234057 | |
parent | 337bbb6297775e8e9d664e96e96004f00d1d8c02 (diff) |
rockchip: clk: rk3399: change extract_bits to bitfield_extract
The RK3399 clk driver still has a left-over use of extract_bits, which
can be replaced by using bitfield_extract from include/bitfield.h.
This rewrites the invocation to use the shared function.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-rw-r--r-- | drivers/clk/rockchip/clk_rk3399.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index e21d056efb..2e85ac7df2 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -569,11 +569,6 @@ static const struct spi_clkreg spi_clkregs[] = { .sel_shift = CLK_SPI5_PLL_SEL_SHIFT, }, }; -static inline u32 extract_bits(u32 val, unsigned width, unsigned shift) -{ - return (val >> shift) & ((1 << width) - 1); -} - static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id) { const struct spi_clkreg *spiclk = NULL; @@ -590,7 +585,8 @@ static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id) } val = readl(&cru->clksel_con[spiclk->reg]); - div = extract_bits(val, CLK_SPI_PLL_DIV_CON_WIDTH, spiclk->div_shift); + div = bitfield_extract(val, spiclk->div_shift, + CLK_SPI_PLL_DIV_CON_WIDTH); return DIV_TO_RATE(GPLL_HZ, div); } |