Makefile.host.tmp: add a new script to refactor tools

This commit adds scripts/Makefile.host.tmp which will
be used in the next commit to convert makefiles
under tools/ directory to Kbuild style.

Notice this script, scripts/Makefile.host.tmp
is temporary.

When switching over to real Kbuild,
it will be replaced with scripts/Makefile.host of Linux Kernel.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

2 files changed, 75 insertions, 3 deletions

diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index e3354aaa3f..c451fbfedb 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -7,15 +7,23 @@ include $(TOPDIR)/config.mk
 LIB := $(obj)built-in.o
 LIBGCC = $(obj)libgcc.o
 SRCS :=
+subdir-y :=
+obj-dirs :=
 
 include Makefile
 
+# Do not include host rules unless needed
+ifneq ($(hostprogs-y)$(hostprogs-m),)
+include $(SRCTREE)/scripts/Makefile.host.tmp
+endif
+
 # Going forward use the following
 obj-y := $(sort $(obj-y))
 extra-y := $(sort $(extra-y))
+always := $(sort $(always))
 lib-y := $(sort $(lib-y))
 
-subdir-y 	:= $(patsubst %/,%,$(filter %/, $(obj-y)))
+subdir-y 	+= $(patsubst %/,%,$(filter %/, $(obj-y)))
 obj-y		:= $(patsubst %/, %/built-in.o, $(obj-y))
 subdir-obj-y	:= $(filter %/built-in.o, $(obj-y))
 subdir-obj-y	:= $(addprefix $(obj),$(subdir-obj-y))
@@ -25,7 +33,8 @@ SRCS	+= $(wildcard $(obj-y:.o=.c) $(obj-y:.o=.S) $(lib-y:.o=.c) \
 OBJS	:= $(addprefix $(obj),$(obj-y))
 
 # $(obj-dirs) is a list of directories that contain object files
-obj-dirs := $(dir $(OBJS))
+
+obj-dirs += $(dir $(OBJS))
 
 # Create directories for object files if directory does not exist
 # Needed when obj-y := dir/file.o syntax is used
@@ -33,7 +42,7 @@ _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
 
 LGOBJS := $(addprefix $(obj),$(sort $(lib-y)))
 
-all: $(LIB) $(addprefix $(obj),$(extra-y))
+all: $(LIB) $(addprefix $(obj),$(extra-y) $(always)) $(subdir-y)
 
 $(LIB):	$(obj).depend $(OBJS)
 	$(call cmd_link_o_target, $(OBJS))
@@ -48,7 +57,9 @@ endif
 ifneq ($(subdir-obj-y),)
 # Descending
 $(subdir-obj-y): $(subdir-y)
+endif
 
+ifneq ($(subdir-y),)
 $(subdir-y): FORCE
 	$(MAKE) -C $@ -f $(TOPDIR)/scripts/Makefile.build
 endif
diff --git a/scripts/Makefile.host.tmp b/scripts/Makefile.host.tmp
new file mode 100644
index 0000000000..4b57846f4a
--- /dev/null
+++ b/scripts/Makefile.host.tmp
@@ -0,0 +1,61 @@
+
+__hostprogs := $(sort $(hostprogs-y) $(hostprogs-m))
+
+# C code
+# Executables compiled from a single .c file
+host-csingle	:= $(foreach m,$(__hostprogs),$(if $($(m)-objs),,$(m)))
+
+# C executables linked based on several .o files
+host-cmulti	:= $(foreach m,$(__hostprogs),$(if $($(m)-objs),$(m)))
+
+# Object (.o) files compiled from .c files
+host-cobjs	:= $(sort $(foreach m,$(__hostprogs),$($(m)-objs)))
+
+# output directory for programs/.o files
+# hostprogs-y := tools/build may have been specified. Retrieve directory
+host-objdirs := $(foreach f,$(__hostprogs), $(if $(dir $(f)),$(dir $(f))))
+# directory of .o files from prog-objs notation
+host-objdirs += $(foreach f,$(host-cmulti),                  \
+                    $(foreach m,$($(f)-objs),                \
+                        $(if $(dir $(m)),$(dir $(m)))))
+
+host-objdirs := $(strip $(sort $(filter-out ./,$(host-objdirs))))
+
+__hostprogs     := $(addprefix $(obj),$(__hostprogs))
+host-csingle	:= $(addprefix $(obj),$(host-csingle))
+host-cmulti	:= $(addprefix $(obj),$(host-cmulti))
+host-cobjs	:= $(addprefix $(obj),$(host-cobjs))
+host-objdirs    := $(addprefix $(obj),$(host-objdirs))
+
+obj-dirs += $(host-objdirs)
+
+#####
+# Handle options to gcc. Support building with separate output directory
+
+_hostc_flags   = $(HOSTCFLAGS)   $(HOST_EXTRACFLAGS)   \
+                 $(HOSTCFLAGS_$(basetarget).o)
+
+# Find all -I options and call addtree
+flags = $(foreach o,$($(1)),$(if $(filter -I%,$(o)),$(call addtree,$(o)),$(o)))
+
+ifeq ($(OBJTREE),$(SRCTREE))
+__hostc_flags	= $(_hostc_flags)
+else
+__hostc_flags	= -I$(obj) $(call flags,_hostc_flags)
+endif
+
+hostc_flags    = $(__hostc_flags)
+
+#####
+# Compile programs on the host
+
+$(host-csingle): $(obj)%: %.c
+	$(HOSTCC) $(HOSTCFLAGS) $(HOST_EXTRACFLAGS) $(HOSTLDFLAGS) $(HOSTCFLAGS_$(@F)) $(HOSTCFLAGS_$(BCURDIR)) -o $@ $<
+
+$(host-cmulti): $(obj)%: $(host-cobjs)
+	$(HOSTCC) $(HOSTLDFLAGS) -o $@ $(addprefix $(obj),$($(@F)-objs)) $(HOSTLOADLIBES_$(@F))
+
+$(host-cobjs): $(obj)%.o: %.c
+	$(HOSTCC) $(HOSTCFLAGS) $(HOST_EXTRACFLAGS) $(HOSTCFLAGS_$(@F)) $(HOSTCFLAGS_$(BCURDIR)) -o $@ $< -c
+
+targets += $(host-csingle)  $(host-cmulti) $(host-cobjs)