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authorVignesh Raghavendra <vigneshr@ti.com>2020-01-27 17:59:25 +0530
committerLokesh Vutla <lokeshvutla@ti.com>2020-02-04 09:07:24 +0530
commitb070f58b44f9c738fd197e203c193ddbddcefdbb (patch)
treeafa0ab62ca7ed49c46627cce34704ebe18b107ed
parente15b6e35b174d6b3aafaab4c30f4c3ff5460bb16 (diff)
arm: dts: k3-j721e-common-proc-board: Enable USB0 in peripheral mode
Enable USB0 in peripheral mode so that it be used for DFU Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
-rw-r--r--arch/arm/dts/k3-j721e-r5-common-proc-board.dts18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index 28a355d49c..585cc83963 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -40,6 +40,13 @@
clock-frequency = <200000000>;
u-boot,dm-spl;
};
+
+ clk_19_2mhz: dummy_clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <19200000>;
+ u-boot,dm-spl;
+ };
};
&cbass_mcu_wakeup {
@@ -207,4 +214,15 @@
u-boot,dm-spl;
};
+&usbss0 {
+ /delete-property/ power-domains;
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ clocks = <&clk_19_2mhz>;
+ clock-names = "usb2_refclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usbss0_pins_default>;
+ ti,vbus-divider;
+};
+
#include "k3-j721e-common-proc-board-u-boot.dtsi"