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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2012-08-13 22:49:53 +0200
committerScott Wood <scottwood@freescale.com>2012-09-17 19:51:45 -0500
commitb8fea2b27d7aeabd2e0bc4242277ff2787c7c622 (patch)
tree64e33e0d40217f49b1e24b61cef834cf0d82261b
parentc1db8dd62b337372a08942e1c5945a8590afbc58 (diff)
spl mxc nand: Fix broken boot for correctable ECC errors
Do not stop boot as soon as an ECC error is detected. Only stop boot for uncorrectable ECC errors. This fixes boards no longer booting after some time because a NAND Flash bit has flipped. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
-rw-r--r--nand_spl/nand_boot_fsl_nfc.c16
1 files changed, 14 insertions, 2 deletions
diff --git a/nand_spl/nand_boot_fsl_nfc.c b/nand_spl/nand_boot_fsl_nfc.c
index 4c5a7feec1..ea05952eb5 100644
--- a/nand_spl/nand_boot_fsl_nfc.c
+++ b/nand_spl/nand_boot_fsl_nfc.c
@@ -140,9 +140,21 @@ static void nfc_nand_data_output(void)
static int nfc_nand_check_ecc(void)
{
#if defined(MXC_NFC_V1)
- return readw(&nfc->ecc_status_result);
+ u16 ecc_status = readw(&nfc->ecc_status_result);
+ return (ecc_status & 0x3) == 2 || (ecc_status >> 2) == 2;
#elif defined(MXC_NFC_V1_1)
- return readl(&nfc->ecc_status_result);
+ u32 ecc_status = readl(&nfc->ecc_status_result);
+ int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
+ int err_limit = CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16 ? 8 : 4;
+ int subpages = CONFIG_SYS_NAND_PAGE_SIZE / 512;
+
+ do {
+ if ((ecc_status & 0xf) > err_limit)
+ return 1;
+ ecc_status >>= 4;
+ } while (--subpages);
+
+ return 0;
#endif
}