diff options
| author | Marek Vasut <marex@denx.de> | 2012-08-29 03:49:51 +0000 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2012-09-27 12:22:10 -0500 |
| commit | c0b5a3bbb0cd40a6b23b7b07e2182a5bcdc8c31c (patch) | |
| tree | 0b5882164b03735b057be896cf120bf1bcc8638f | |
| parent | 67449098a86be18cbdb27345bebe8da57e5d8899 (diff) | |
FEC: Replace magic contants
Replace the magic contant 1 << 24 with properly defined bits.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
| -rw-r--r-- | drivers/net/fec_mxc.c | 6 | ||||
| -rw-r--r-- | drivers/net/fec_mxc.h | 3 |
2 files changed, 6 insertions, 3 deletions
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 6ede464cc9..3e232c7cbc 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -256,7 +256,7 @@ static int miiphy_wait_aneg(struct eth_device *dev) static int fec_rx_task_enable(struct fec_priv *fec) { - writel(1 << 24, &fec->eth->r_des_active); + writel(FEC_R_DES_ACTIVE_RDAR, &fec->eth->r_des_active); return 0; } @@ -267,7 +267,7 @@ static int fec_rx_task_disable(struct fec_priv *fec) static int fec_tx_task_enable(struct fec_priv *fec) { - writel(1 << 24, &fec->eth->x_des_active); + writel(FEC_X_DES_ACTIVE_TDAR, &fec->eth->x_des_active); return 0; } @@ -769,7 +769,7 @@ static int fec_send(struct eth_device *dev, void *packet, int length) * barrier here. */ while (--timeout) { - if (!(readl(&fec->eth->x_des_active) & (1 << 24))) + if (!(readl(&fec->eth->x_des_active) & FEC_X_DES_ACTIVE_TDAR)) break; } diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index 852b2e07e7..203285af9a 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -213,6 +213,9 @@ struct ethernet_regs { #define FEC_X_WMRK_STRFWD 0x00000100 +#define FEC_X_DES_ACTIVE_TDAR 0x01000000 +#define FEC_R_DES_ACTIVE_RDAR 0x01000000 + #if defined(CONFIG_MX25) || defined(CONFIG_MX53) /* defines for MIIGSK */ /* RMII frequency control: 0=50MHz, 1=5MHz */ |