diff options
| author | Marek Vasut <marex@denx.de> | 2015-12-20 04:00:46 +0100 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-12-22 21:30:02 +0100 |
| commit | c339ea5bfe7129ac0e832df253df855c1e73cc84 (patch) | |
| tree | 99050b7fa61d41507484ffeacb1283cd3aa8a1f0 | |
| parent | eba522a0f7e0bae819633977aa9ad905775a1b68 (diff) | |
arm: socfpga: Add support for Denali NAND controller
Add common configuration bits for the Denali NAND controller and also
support for using it as a boot device in SPL.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
| -rw-r--r-- | include/configs/socfpga_common.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 2d1765d742..a09e906a6b 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -161,6 +161,19 @@ #endif /* + * NAND Support + */ +#ifdef CONFIG_NAND_DENALI +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_MAX_CHIPS 1 +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_NAND_DENALI_ECC_SIZE 512 +#define CONFIG_SYS_NAND_REGS_BASE SOCFPGA_NANDREGS_ADDRESS +#define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NANDDATA_ADDRESS +#define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) +#endif + +/* * I2C support */ #define CONFIG_SYS_I2C @@ -338,6 +351,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #ifdef CONFIG_DM_SPI #define CONFIG_SPL_SPI_SUPPORT #endif +#ifdef CONFIG_SPL_NAND_DENALI +#define CONFIG_SPL_NAND_SUPPORT +#endif /* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT @@ -360,6 +376,13 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 #endif +/* SPL NAND boot support */ +#ifdef CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SYS_NAND_USE_FLASH_BBT +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 +#endif + /* * Stack setup */ |