diff options
| author | Stefan Roese <sr@denx.de> | 2010-11-23 14:32:06 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-11-26 22:08:19 +0100 |
| commit | c56f84ca9c86d7b9ac4a79ce6c9569aa8b851833 (patch) | |
| tree | 98f30ecbdfa935ea2b9e8d1be9a032da052e0092 | |
| parent | aa72d8baaa38391c4fd2cbea7b20b03ad7829042 (diff) | |
ppc4xx: Fix build problems of IBM DDR2 NAND booting targets
This change is needed to compile the PPC4xx NAND booting targets
equipped with the IBM DDR2 SDRAM controller.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
| -rw-r--r-- | board/amcc/canyonlands/canyonlands.c | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c index faa3720df3..80e2739fe0 100644 --- a/board/amcc/canyonlands/canyonlands.c +++ b/board/amcc/canyonlands/canyonlands.c @@ -363,18 +363,6 @@ int checkboard(void) } #endif /* !defined(CONFIG_ARCHES) */ -#if defined(CONFIG_NAND_U_BOOT) -/* - * NAND booting U-Boot version uses a fixed initialization, since the whole - * I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot - * code. - */ -phys_size_t initdram(int board_type) -{ - return CONFIG_SYS_MBYTES_SDRAM << 20; -} -#endif - #if defined(CONFIG_PCI) int board_pcie_first(void) { |