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authorDavid Wu <david.wu@rock-chips.com>2019-04-16 21:50:56 +0800
committerKever Yang <kever.yang@rock-chips.com>2019-05-08 17:34:12 +0800
commitcd8f00ce08102d2dbb350c76bbb53f7b0f804b7d (patch)
tree0b68a95f7046fd56a80506d8afe4343192614eda
parent54e75702c48a9757e82cbe71176c0b5ddcf6a092 (diff)
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' iomux
RK3288 pmu_gpio0 iomux setting have no higher 16 writing corresponding bits, need to read before write the register. Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
-rw-r--r--drivers/pinctrl/rockchip/pinctrl-rk3288.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 1fa601d954..5040cd8f48 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -54,7 +54,15 @@ static int rk3288_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
}
}
- data = (mask << (bit + 16));
+ /* bank0 is special, there are no higher 16 bit writing bits. */
+ if (bank->bank_num == 0) {
+ regmap_read(regmap, reg, &data);
+ data &= ~(mask << bit);
+ } else {
+ /* enable the write to the equivalent lower bits */
+ data = (mask << (bit + 16));
+ }
+
data |= (mux & mask) << bit;
ret = regmap_write(regmap, reg, data);