diff options
author | Peter Tyser <ptyser@xes-inc.com> | 2008-09-16 10:04:47 -0500 |
---|---|---|
committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-09-16 11:32:45 -0500 |
commit | ce47eb402c5e29a025399dc282246414fc492940 (patch) | |
tree | 993313336b71bf495461cc8dd89f8afbb8858c9b | |
parent | c0d2f87d6c450128b88e73eea715fa3654f65b6c (diff) |
Support for multiple SGMII/TBI interfaces for TSEC ethernet
Fix TBI PHY accesses to use the proper offset in CPU register space. The
previous code would incorrectly access the TBI PHY by reading/writing to CPU
register space at the same location as would be used to access external PHYs.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>
-rw-r--r-- | drivers/net/tsec.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index f81211adb9..8ab6d07303 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -283,11 +283,13 @@ uint tsec_local_mdio_read(volatile tsec_t *phyregs, uint phyid, uint regnum) /* Configure the TBI for SGMII operation */ static void tsec_configure_serdes(struct tsec_private *priv) { - tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_ANA, + /* Access TBI PHY registers at given TSEC register offset as opposed to the + * register offset used for external PHY accesses */ + tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_ANA, TBIANA_SETTINGS); - tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_TBICON, + tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_TBICON, TBICON_CLK_SELECT); - tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_CR, + tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_CR, TBICR_SETTINGS); } |