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authorWeijie Gao <weijie.gao@mediatek.com>2018-12-20 16:12:54 +0800
committerTom Rini <trini@konsulko.com>2019-01-14 17:43:18 -0500
commitd9506a6fdd0269f86c7a1fe5bbee7191acc3d1c8 (patch)
tree4d72a955db2b4d58ab92e6d64a8bd02bc285dc37
parent23f17164d9ed6b92f7cd2064aa80f15da5489056 (diff)
arm: dts: add ethernet related node for MT7623 SoC
This patch adds ethernet gmac node for MT7623 with MT7530 gigabit switch. Signed-off-by: Mark Lee <Mark-MC.Lee@mediatek.com>
-rw-r--r--arch/arm/dts/mt7623.dtsi21
-rw-r--r--arch/arm/dts/mt7623n-bananapi-bpi-r2.dts13
2 files changed, 33 insertions, 1 deletions
diff --git a/arch/arm/dts/mt7623.dtsi b/arch/arm/dts/mt7623.dtsi
index f50f4ef1b9..448d1d7381 100644
--- a/arch/arm/dts/mt7623.dtsi
+++ b/arch/arm/dts/mt7623.dtsi
@@ -10,6 +10,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/mt7623-power.h>
+#include <dt-bindings/reset/mtk-reset.h>
#include "skeleton.dtsi"
/ {
@@ -248,8 +249,26 @@
};
ethsys: syscon@1b000000 {
- compatible = "mediatek,mt7623-ethsys";
+ compatible = "mediatek,mt7623-ethsys", "syscon";
reg = <0x1b000000 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ eth: ethernet@1b100000 {
+ compatible = "mediatek,mt7623-eth", "syscon";
+ reg = <0x1b100000 0x20000>;
+ clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
+ <&ethsys CLK_ETHSYS_ESW>,
+ <&ethsys CLK_ETHSYS_GP1>,
+ <&ethsys CLK_ETHSYS_GP2>,
+ <&apmixedsys CLK_APMIXED_TRGPLL>;
+ clock-names = "ethif", "esw", "gp1", "gp2", "trgpll";
+ power-domains = <&scpsys MT7623_POWER_DOMAIN_ETH>;
+ resets = <&ethsys ETHSYS_FE_RST>,
+ <&ethsys ETHSYS_MCM_RST>;
+ reset-names = "fe", "mcm";
+ mediatek,ethsys = <&ethsys>;
+ status = "disabled";
};
};
diff --git a/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts
index 84a77fde44..51628bb639 100644
--- a/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts
@@ -67,6 +67,19 @@
};
};
+&eth {
+ status = "okay";
+ mediatek,gmac-id = <0>;
+ phy-mode = "rgmii";
+ mediatek,switch = "mt7530";
+ reset-gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
+
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_default>;