diff options
| author | Pavel Machek <pavel@denx.de> | 2015-04-23 09:14:01 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-04-24 05:22:21 +0200 |
| commit | daa23f5128659929eb139dd5250983770796d068 (patch) | |
| tree | cae0b7a21bb2d3d7123662839416cb02278a1812 | |
| parent | b284d268aff2253b162c636bc63d8fd289159296 (diff) | |
socfpga: implement socdk SPI flash config in dts
SocDK has same QSPI and SPI flash configuration as Socrates. Add
support for it.
Signed-off-by: Pavel Machek <pavel@denx.de>
| -rw-r--r-- | arch/arm/dts/socfpga_cyclone5_socdk.dts | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts index 8e1f88c2c7..0b300b92be 100644 --- a/arch/arm/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts @@ -25,6 +25,10 @@ * to be added to the gmac1 device tree blob. */ ethernet0 = &gmac1; + + spi0 = "/spi@ff705000"; /* QSPI */ + spi1 = "/spi@fff00000"; + spi2 = "/spi@fff01000"; }; regulator_3_3v: 3-3-v-regulator { @@ -77,3 +81,23 @@ &usb1 { status = "okay"; }; + +&qspi { + status = "okay"; + + flash0: n25q00@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "n25q00"; + reg = <0>; /* chip select */ + spi-max-frequency = <50000000>; + m25p,fast-read; + page-size = <256>; + block-size = <16>; /* 2^16, 64KB */ + read-delay = <4>; /* delay value in read data capture register */ + tshsl-ns = <50>; + tsd2d-ns = <50>; + tchsh-ns = <4>; + tslch-ns = <4>; + }; +}; |