diff options
author | Eugen Hristev <eugen.hristev@microchip.com> | 2018-08-03 12:10:49 +0300 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2018-08-13 14:03:57 -0400 |
commit | e9cd3d70244a4a262c6b1935df87c85d25df5344 (patch) | |
tree | d16c36696f4b17b418ead404bd8c5358f9087b15 | |
parent | 1246040cdaa5c9a1d7216777b06c11c441a187ea (diff) |
clk: at91: utmi: add timeout for utmi lock
In case the slow clock is not properly configured, the UTMI clock
cannot lock the PLL, because UPLLCOUNT will "wait X slow clock cycles".
In this case U-boot will loop indefinitely.
Added a timeout in this case, to start U-boot even if UTMI clock is
not enabled, so the user can use different media if needed, or investigate.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
-rw-r--r-- | drivers/clk/at91/clk-utmi.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c index 0b562610a2..e8506099fd 100644 --- a/drivers/clk/at91/clk-utmi.c +++ b/drivers/clk/at91/clk-utmi.c @@ -28,6 +28,7 @@ static int utmi_clk_enable(struct clk *clk) u32 utmi_ref_clk_freq; u32 tmp; int err; + int timeout = 2000000; if (readl(&pmc->sr) & AT91_PMC_LOCKU) return 0; @@ -85,8 +86,12 @@ static int utmi_clk_enable(struct clk *clk) AT91_PMC_BIASEN; writel(tmp, &pmc->uckr); - while (!(readl(&pmc->sr) & AT91_PMC_LOCKU)) + while ((--timeout) && !(readl(&pmc->sr) & AT91_PMC_LOCKU)) ; + if (!timeout) { + printf("UTMICK: timeout waiting for UPLL lock\n"); + return -ETIMEDOUT; + } return 0; } |