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authorAlexey Brodkin <abrodkin@synopsys.com>2017-11-17 16:02:17 +0300
committerAlexey Brodkin <abrodkin@synopsys.com>2017-11-24 19:38:23 +0300
commitf2a226780fa0e4055bec636b8108bf7e80951174 (patch)
tree3993a46a82b2b94350a438e6bae0bd717761433a
parentd764a20f2bcab2e76bce0751ed125b0c32f9d82f (diff)
arc: cache: Add required NOPs after invalidation of instruction cache
As per ARC HS databook (see chapter 5.3.3.2) it is required to add 3 NOPs after each write to IC_IVIC which we do from now on. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Eugeniy Paltsev <paltsev@synopsys.com>
-rw-r--r--arch/arc/lib/cache.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index cbae27e9fc..d8741fe959 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -278,6 +278,13 @@ void invalidate_icache_all(void)
/* Any write to IC_IVIC register triggers invalidation of entire I$ */
if (icache_status()) {
write_aux_reg(ARC_AUX_IC_IVIC, 1);
+ /*
+ * As per ARC HS databook (see chapter 5.3.3.2)
+ * it is required to add 3 NOPs after each write to IC_IVIC.
+ */
+ __builtin_arc_nop();
+ __builtin_arc_nop();
+ __builtin_arc_nop();
read_aux_reg(ARC_AUX_IC_CTRL); /* blocks */
}
}