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authorTom Rini <trini@konsulko.com>2020-05-14 08:30:03 -0400
committerTom Rini <trini@konsulko.com>2020-07-01 10:11:03 -0400
commitf2ff327e9354cdfb13c9885d5e5c646dff3ca53b (patch)
treed9e310d25c11a7dc0421f4540e6b5bf31ecf7ca7
parent443f223675d1d91716e220d3fde8e2852d900f49 (diff)
tegra: Convert from ACCESS_ONCE to READ/WRITE_ONCE
In order to update our <linux/compiler.h> to a newer version that no longer provides ACCESS_ONCE() but only READ_ONCE()/WRITE_ONCE() we need to convert arch/arm/mach-tegra/ivc.c to the other macros. Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Tom Rini <trini@konsulko.com>
-rw-r--r--arch/arm/mach-tegra/ivc.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-tegra/ivc.c b/arch/arm/mach-tegra/ivc.c
index e7c6d78744..b69a458fdf 100644
--- a/arch/arm/mach-tegra/ivc.c
+++ b/arch/arm/mach-tegra/ivc.c
@@ -124,11 +124,11 @@ static inline int tegra_ivc_channel_empty(struct tegra_ivc *ivc,
{
/*
* This function performs multiple checks on the same values with
- * security implications, so create snapshots with ACCESS_ONCE() to
+ * security implications, so create snapshots with READ_ONCE() to
* ensure that these checks use the same values.
*/
- uint32_t w_count = ACCESS_ONCE(ch->w_count);
- uint32_t r_count = ACCESS_ONCE(ch->r_count);
+ uint32_t w_count = READ_ONCE(ch->w_count);
+ uint32_t r_count = READ_ONCE(ch->r_count);
/*
* Perform an over-full check to prevent denial of service attacks where
@@ -153,14 +153,14 @@ static inline int tegra_ivc_channel_full(struct tegra_ivc *ivc,
* Invalid cases where the counters indicate that the queue is over
* capacity also appear full.
*/
- return (ACCESS_ONCE(ch->w_count) - ACCESS_ONCE(ch->r_count)) >=
+ return (READ_ONCE(ch->w_count) - READ_ONCE(ch->r_count)) >=
ivc->nframes;
}
static inline void tegra_ivc_advance_rx(struct tegra_ivc *ivc)
{
- ACCESS_ONCE(ivc->rx_channel->r_count) =
- ACCESS_ONCE(ivc->rx_channel->r_count) + 1;
+ WRITE_ONCE(ivc->rx_channel->r_count,
+ READ_ONCE(ivc->rx_channel->r_count) + 1);
if (ivc->r_pos == ivc->nframes - 1)
ivc->r_pos = 0;
@@ -170,8 +170,8 @@ static inline void tegra_ivc_advance_rx(struct tegra_ivc *ivc)
static inline void tegra_ivc_advance_tx(struct tegra_ivc *ivc)
{
- ACCESS_ONCE(ivc->tx_channel->w_count) =
- ACCESS_ONCE(ivc->tx_channel->w_count) + 1;
+ WRITE_ONCE(ivc->tx_channel->w_count,
+ READ_ONCE(ivc->tx_channel->w_count) + 1);
if (ivc->w_pos == ivc->nframes - 1)
ivc->w_pos = 0;
@@ -232,7 +232,7 @@ static inline uint32_t tegra_ivc_channel_avail_count(struct tegra_ivc *ivc,
* comment in tegra_ivc_channel_empty() for an explanation about
* special over-full considerations.
*/
- return ACCESS_ONCE(ch->w_count) - ACCESS_ONCE(ch->r_count);
+ return READ_ONCE(ch->w_count) - READ_ONCE(ch->r_count);
}
int tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc, void **frame)
@@ -358,7 +358,7 @@ int tegra_ivc_channel_notified(struct tegra_ivc *ivc)
/* Copy the receiver's state out of shared memory. */
offset = offsetof(struct tegra_ivc_channel_header, w_count);
tegra_ivc_invalidate_counter(ivc, ivc->rx_channel, offset);
- peer_state = ACCESS_ONCE(ivc->rx_channel->state);
+ peer_state = READ_ONCE(ivc->rx_channel->state);
if (peer_state == ivc_state_sync) {
/*