diff options
| author | Dave Liu <daveliu@freescale.com> | 2010-03-05 12:23:00 +0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-04-26 22:37:53 -0500 |
| commit | f8d05e5e5888d88ab42524d699924936e8e77970 (patch) | |
| tree | c9fea664ccc43847d66c2fff1610cb291a436573 | |
| parent | 1231c498e016b5bfe85f1eb87c2e044d3389d7da (diff) | |
fsl-ddr: add the macro for Rtt_Nom definition
add the macro definition for Rtt_Nom termination value for DDR3
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| -rw-r--r-- | arch/powerpc/include/asm/fsl_ddr_sdram.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h index 3216a50633..02920dbfd7 100644 --- a/arch/powerpc/include/asm/fsl_ddr_sdram.h +++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h @@ -1,5 +1,5 @@ /* - * Copyright 2008-2009 Freescale Semiconductor, Inc. + * Copyright 2008-2010 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -24,6 +24,12 @@ #define DDR_OTF 6 /* on-the-fly BC4 and BL8 */ #define DDR_BL8 8 /* burst length 8 */ +#define DDR3_RTT_60_OHM 1 /* RTT_Nom = RZQ/4 */ +#define DDR3_RTT_120_OHM 2 /* RTT_Nom = RZQ/2 */ +#define DDR3_RTT_40_OHM 3 /* RTT_Nom = RZQ/6 */ +#define DDR3_RTT_20_OHM 4 /* RTT_Nom = RZQ/12 */ +#define DDR3_RTT_30_OHM 5 /* RTT_Nom = RZQ/8 */ + #if defined(CONFIG_FSL_DDR1) #define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR (1) typedef ddr1_spd_eeprom_t generic_spd_eeprom_t; |