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authorLaurentiu Tudor <laurentiu.tudor@nxp.com>2018-08-09 15:19:42 +0300
committerYork Sun <york.sun@nxp.com>2018-08-10 10:34:42 -0700
commitfa0706ef92dc680f16b96659f1177822a3335bb4 (patch)
tree999c68987fdb984e8a30506cf7afd83db0fc3008
parent1666fa587bfaa5ab72ea7bb9e2a811494c2a3e7b (diff)
armv8: fsl-layerscape: add missing register blocks base address defines
Add defines for the edma and qdma register block base addresses. Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com> Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 5b4767e0fe..644a16dd30 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -88,8 +88,12 @@
#define LPUART_BASE (CONFIG_SYS_IMMR + 0x01950000)
+#define EDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x01c00000)
+
#define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x02200000)
+#define QDMA_BASE_ADDR (CONFIG_SYS_IMMR + 0x07380000)
+
#define CONFIG_SYS_PCIE1_PHYS_ADDR 0x4000000000ULL
#define CONFIG_SYS_PCIE2_PHYS_ADDR 0x4800000000ULL
#define CONFIG_SYS_PCIE3_PHYS_ADDR 0x5000000000ULL