diff options
author | Tom Rini <trini@konsulko.com> | 2016-07-15 15:30:33 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2016-07-16 09:42:51 -0400 |
commit | fc5d54b7fa3fa602e06e2f0863c0b134d6afca70 (patch) | |
tree | b059a6cfb975189b122b3b69a1e9921e4e003988 | |
parent | 1f9ef0dca0a1315f0a216808ade8946bcc54e2b4 (diff) |
configs: Add more CONFIG_ARMV7_PSCI_NR_CPUS entries
The code had assumed 4 CPUS before and now we have this configurable.
For now, set this to the previous default.
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
-rw-r--r-- | include/configs/arndale.h | 1 | ||||
-rw-r--r-- | include/configs/bcm_ep_board.h | 1 | ||||
-rw-r--r-- | include/configs/vexpress_ca15_tc2.h | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/include/configs/arndale.h b/include/configs/arndale.h index b08f341227..18e59fc73a 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -45,6 +45,7 @@ #define CONFIG_S5P_PA_SYSRAM 0x02020000 #define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM +#define CONFIG_ARMV7_PSCI_NR_CPUS 4 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h index d5888e8a2f..50cd7430b5 100644 --- a/include/configs/bcm_ep_board.h +++ b/include/configs/bcm_ep_board.h @@ -93,5 +93,6 @@ /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER #define CONFIG_CRC32_VERIFY +#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #endif /* __BCM_EP_BOARD_H */ diff --git a/include/configs/vexpress_ca15_tc2.h b/include/configs/vexpress_ca15_tc2.h index b509a9cfd4..9583e8c081 100644 --- a/include/configs/vexpress_ca15_tc2.h +++ b/include/configs/vexpress_ca15_tc2.h @@ -16,5 +16,6 @@ #define CONFIG_SYSFLAGS_ADDR 0x1c010030 #define CONFIG_SMP_PEN_ADDR CONFIG_SYSFLAGS_ADDR +#define CONFIG_ARMV7_PSCI_NR_CPUS 4 #endif |