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author | Nava kishore Manne <nava.manne@xilinx.com> | 2017-05-22 12:05:17 +0530 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2017-11-28 16:09:08 +0100 |
commit | 7689dce753195000ceeb32274fc802cf957f24dc (patch) | |
tree | 154a70d63f6cdda98c1afea5b53ed18886ec6193 /Documentation/devicetree/bindings | |
parent | 6db82e09564f2ba6bb017d91e9920cdde0e1fb37 (diff) |
arm64: zynqmp: Label whole PL part as fpga_full region
This will simplify dt overlay structure for the whole PL.
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'Documentation/devicetree/bindings')
0 files changed, 0 insertions, 0 deletions