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authorTom Rini <trini@konsulko.com>2018-11-16 08:37:50 -0500
committerTom Rini <trini@konsulko.com>2018-11-16 08:37:50 -0500
commit1d6edcbfed2af33c748f2beb399810a0441888da (patch)
treefe88d63e5ef1dbe1915f90e02429e8b6934859da /Documentation
parentf6206f8587fc7ec82a57dbbeb5de0f94b3c2ef49 (diff)
parent4c6e27f63c88d065a98f438085dfc36af47d3a23 (diff)
Merge tag 'pull-14nov18' of git://git.denx.de/u-boot-dm
- virtio implementation and supporting patches - DM_FLAG_PRE_RELOC fixes - regmap improvements - minor buildman and sandbox things
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt19
-rw-r--r--Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt19
-rw-r--r--Documentation/devicetree/bindings/misc/gdsys,soc.txt16
3 files changed, 54 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt b/Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt
new file mode 100644
index 0000000000..acd466fdc6
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt
@@ -0,0 +1,19 @@
+gdsys IHS FPGA for CON devices
+
+The gdsys IHS FPGA is the main FPGA on gdsys CON devices. This driver provides
+support for enabling and starting the FPGA, as well as verifying working bus
+communication.
+
+Required properties:
+- compatible: must be "gdsys,iocon_fpga"
+- reset-gpios: List of GPIOs controlling the FPGA's reset
+- done-gpios: List of GPIOs notifying whether the FPGA's reconfiguration is
+ done
+
+Example:
+
+FPGA0 {
+ compatible = "gdsys,iocon_fpga";
+ reset-gpios = <&PPCPCA 26 0>;
+ done-gpios = <&GPIO_VB0 19 0>;
+};
diff --git a/Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt b/Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt
new file mode 100644
index 0000000000..819db22bf7
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt
@@ -0,0 +1,19 @@
+gdsys IHS FPGA for CPU devices
+
+The gdsys IHS FPGA is the main FPGA on gdsys CPU devices. This driver provides
+support for enabling and starting the FPGA, as well as verifying working bus
+communication.
+
+Required properties:
+- compatible: must be "gdsys,iocpu_fpga"
+- reset-gpios: List of GPIOs controlling the FPGA's reset
+- done-gpios: List of GPIOs notifying whether the FPGA's reconfiguration is
+ done
+
+Example:
+
+FPGA0 {
+ compatible = "gdsys,iocpu_fpga";
+ reset-gpios = <&PPCPCA 26 0>;
+ done-gpios = <&GPIO_VB0 19 0>;
+};
diff --git a/Documentation/devicetree/bindings/misc/gdsys,soc.txt b/Documentation/devicetree/bindings/misc/gdsys,soc.txt
new file mode 100644
index 0000000000..278e935b16
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/gdsys,soc.txt
@@ -0,0 +1,16 @@
+gdsys soc bus driver
+
+This driver provides a simple interface for the busses associated with gdsys
+IHS FPGAs. The bus itself contains devices whose register maps are contained
+within the FPGA's register space.
+
+Required properties:
+- fpga: A phandle to the controlling IHS FPGA
+
+Example:
+
+FPGA0BUS: fpga0bus {
+ compatible = "gdsys,soc";
+ ranges = <0x0 0xe0600000 0x00004000>;
+ fpga = <&FPGA0>;
+};