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authorJagan Teki <jagan@amarulasolutions.com>2018-08-05 11:16:33 +0530
committerJagan Teki <jagan@amarulasolutions.com>2019-01-18 22:19:09 +0530
commit78eb2a41f3e1e3d46e519f6eb51ccd4040f20f25 (patch)
tree8af49ac73a5a7d1ba9fd8450fd396b7fa4ff35c1 /Licenses/README
parent03d87f5909f59523e82d6b77b7b5bcd2054547d4 (diff)
clk: sunxi: Add Allwinner R40 CLK driver
Add initial clock driver for Allwinner R40. - Implement USB bus and USB clocks via ccu_clk_gate for R40, so it can accessed in common clk enable and disable functions from clk_sunxi.c - Implement USB bus and USB resets via ccu_reset table for R40, so it can accessed in common reset deassert and assert functions from reset-sunxi.c Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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