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authorMichal Simek <michal.simek@xilinx.com>2018-08-22 16:18:34 +0200
committerMichal Simek <michal.simek@xilinx.com>2018-10-16 16:53:24 +0200
commit3dc80934f4651a3ef243a393be04b1f7f71daf24 (patch)
tree47991cc6058205842cc8da5722917c72a7af1e3e /MAINTAINERS
parentec48b6c991f400c8583ac2f875d65a8539f0b437 (diff)
net: gem: Do not setup any clock for Xilinx SoC Versal
Xilinx SoC Versal is using fixed clock where setting rate is not supported. That's why workaround the driver till real clock driver is supported. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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