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authorChris Packham <judge.packham@gmail.com>2019-02-11 14:19:56 +1300
committerStefan Roese <sr@denx.de>2019-02-11 09:39:12 +0100
commita6ac775bae7fad1534ffe2b20244b7e7106b12b0 (patch)
tree971a69140bdef8ec899950238554fb19db0116f9 /MAINTAINERS
parent0ef692084363f2de8547db93397c6a69123d26ca (diff)
ARM: mvebu: x530: use MV_DDR_FREQ_SAR
MV_DDR_FREQ_SAR lets the DDR frequency be determined by hardware strapping. This also has the side effect of running the DDR clock in synchronous mode with the CPU core clock rather than from an independent PLL. We've seen this improve reliability in operation across a number of boards and temperature ranges. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
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