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authorBin Meng <bmeng.cn@gmail.com>2018-12-12 06:12:30 -0800
committerAndes <uboot@andestech.com>2018-12-18 09:56:26 +0800
commit644a3cd77e840d1be6a714b8ce284d6ef3ad2f06 (patch)
tree1d9270086f38d553463821a2ea220087d6391867 /README
parent3cfc825261d90472fa11ea72d7ed2d293b744140 (diff)
riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
This adds U-Boot syscon driver for SiFive's Core Local Interruptor (CLINT). The CLINT block holds memory-mapped control and status registers associated with software and timer interrupts. This driver implements the riscv_get_time() API as required by the generic RISC-V timer driver, as well as some other APIs that are needed for handling IPI. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org>
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