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author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2020-05-03 22:48:43 +0800 |
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committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-06-04 18:53:20 +0530 |
commit | a0f47e012fb679baa927feb3e673503c88083aa0 (patch) | |
tree | 159b3201f1da36723a788eaa0e07232333bac59a /arch/.gitignore | |
parent | bf67eb325bea748577f98fd5bb5f10348b223c2a (diff) |
net: tsec: Access TBI PHY through the corresponding MII
When an eTSEC is configured to use TBI, configuration of the
TBI is done through the MIIM registers for that eTSEC.
For example, if a TBI interface is required on eTSEC2, then
the MIIM registers starting at offset 0x2_5520 are used to
configure it.
Fixes: 9a1d6af55ecd ("net: tsec: Add driver model ethernet support")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'arch/.gitignore')
0 files changed, 0 insertions, 0 deletions