diff options
| author | Patrick Delaunay <patrick.delaunay@st.com> | 2019-02-12 11:44:39 +0100 |
|---|---|---|
| committer | Patrick Delaunay <patrick.delaunay@st.com> | 2019-04-12 16:09:13 +0200 |
| commit | abf2678f0f0d796295f3bfbe422436292e0795f7 (patch) | |
| tree | d084a4a8f8708d49e7dbb82ad90c6d8e880eb9ff /arch/arm/Kconfig | |
| parent | 48ff1bc4f0a97c3291d0c87c2717fc1d79da5ef5 (diff) | |
stm32mp1: add trusted boot with TF-A
Add support of trusted boot, using TF-A as first stage bootloader,
The boot sequence is
BootRom >=> TF-A.stm32 (clock & DDR) >=> U-Boot.stm32
The TF-A monitor provides secure monitor with support of SMC
- proprietary to manage secure devices (BSEC for example)
- PSCI for power
The same device tree is used for STMicroelectronics boards with
basic boot and with trusted boot.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'arch/arm/Kconfig')
| -rw-r--r-- | arch/arm/Kconfig | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4a23e327df..764547091c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1406,8 +1406,10 @@ config ARCH_STM32MP help Support for STM32MP SoC family developed by STMicroelectronics, MPUs based on ARM cortex A core - U-BOOT is running in DDR and SPL support is the unsecure First Stage - BootLoader (FSBL) + U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL). + FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot + chain. + SPL is the unsecure FSBL for the basic boot chain. config ARCH_ROCKCHIP bool "Support Rockchip SoCs" |