diff options
| author | Fabio Estevam <fabio.estevam@freescale.com> | 2011-04-18 07:38:11 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-04-27 19:38:05 +0200 |
| commit | 25d8e1bb197e9d3b165b64202014565e8be5a6c4 (patch) | |
| tree | 2405878d4f039db8c63073dd214f4d574eab37eb /arch/arm/cpu/arm1136/mx31 | |
| parent | 4adaf9bf097b57af12f9a598759f8c9990e3502e (diff) | |
MX31: Introduce get_reset_cause()
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Diffstat (limited to 'arch/arm/cpu/arm1136/mx31')
| -rw-r--r-- | arch/arm/cpu/arm1136/mx31/generic.c | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index 9b7a7a24c1..18572b9d37 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -132,11 +132,38 @@ char *get_cpu_rev(void) return "unknown"; } +char *get_reset_cause(void) +{ + /* read RCSR register from CCM module */ + struct clock_control_regs *ccm = + (struct clock_control_regs *)CCM_BASE; + + u32 cause = readl(&ccm->rcsr) & 0x07; + + switch (cause) { + case 0x0000: + return "POR"; + break; + case 0x0001: + return "RST"; + break; + case 0x0002: + return "WDOG"; + break; + case 0x0006: + return "JTAG"; + break; + default: + return "unknown reset"; + } +} + #if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo (void) { - printf("CPU: Freescale i.MX31 rev %s at %d MHz\n", + printf("CPU: Freescale i.MX31 rev %s at %d MHz.", get_cpu_rev(), mx31_get_mcu_main_clk() / 1000000); + printf("Reset cause: %s\n", get_reset_cause()); return 0; } #endif |