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authorHelmut Raiger <helmut.raiger@hale.at>2011-10-27 01:31:13 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-11-03 22:56:20 +0100
commitd121d20195aca8c7bd76f1ba67ee84f8964330c4 (patch)
treeeca55d9198689e5ec998a4e04145d17b2bc861f8 /arch/arm/cpu/arm1136/mx31
parentdeb53483df20d3a02bb041624ca91c93adc3ec87 (diff)
mx31: define pins and init for UART2 and CSPI3
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/cpu/arm1136/mx31')
-rw-r--r--arch/arm/cpu/arm1136/mx31/devices.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm1136/mx31/devices.c b/arch/arm/cpu/arm1136/mx31/devices.c
index 1e7d48f8fb..b42dac3fbe 100644
--- a/arch/arm/cpu/arm1136/mx31/devices.c
+++ b/arch/arm/cpu/arm1136/mx31/devices.c
@@ -38,7 +38,22 @@ void mx31_uart1_hw_init(void)
}
#endif
+#ifdef CONFIG_SYS_MX31_UART2
+void mx31_uart2_hw_init(void)
+{
+ /* setup pins for UART2 */
+ mx31_gpio_mux(MUX_RXD2__UART2_RXD_MUX);
+ mx31_gpio_mux(MUX_TXD2__UART2_TXD_MUX);
+ mx31_gpio_mux(MUX_RTS2__UART2_RTS_B);
+ mx31_gpio_mux(MUX_CTS2__UART2_CTS_B);
+}
+#endif
+
#ifdef CONFIG_MXC_SPI
+/*
+ * Note: putting several spi setups here makes no sense as they may differ
+ * at board level (physical pin SS0 of CSPI2 may aswell be used as SS0 of CSPI3)
+ */
void mx31_spi2_hw_init(void)
{
/* SPI2 */