Tegra20: Move some code files to common directories for upcoming Tegra30 patches.

Move files that are going to be common between T20 and T30 into 'tegra-common'
subdirs in AVP (arm720t), CPU (armv7), and shared (arch/arm/cpu/.) areas. Any
files that are left behind in '/tegra20' will be copied to '/tegra30' subdirs
and modified for that SoC. The 'common' files should need only minor changes.

Include files (arch/arm/include/asm/arch-tegra/tegra20) will be done in a
follow-on patch.

Builds fine w/MAKEALL -s tegra20. Checkpatch.pl is clean.

Signed-off-by: Tom Warren <twarren@nvidia.com>

5 files changed, 1 insertions, 260 deletions

diff --git a/arch/arm/cpu/arm720t/tegra20/Makefile b/arch/arm/cpu/arm720t/tegra20/Makefile
index 6e484756dd..8958e6516f 100644
--- a/arch/arm/cpu/arm720t/tegra20/Makefile
+++ b/arch/arm/cpu/arm720t/tegra20/Makefile
@@ -28,7 +28,6 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(SOC).o
 
 COBJS-y	+= cpu.o
-COBJS-$(CONFIG_SPL_BUILD) += spl.o
 
 SRCS	:= $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS-y))
diff --git a/arch/arm/cpu/arm720t/tegra20/board.h b/arch/arm/cpu/arm720t/tegra20/board.h
deleted file mode 100644
index 61b91c005f..0000000000
--- a/arch/arm/cpu/arm720t/tegra20/board.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * (C) Copyright 2010-2011
- * NVIDIA Corporation <www.nvidia.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-void board_init_uart_f(void);
-void gpio_config_uart(void);
diff --git a/arch/arm/cpu/arm720t/tegra20/cpu.c b/arch/arm/cpu/arm720t/tegra20/cpu.c
index ddf8d979f4..8b7293852c 100644
--- a/arch/arm/cpu/arm720t/tegra20/cpu.c
+++ b/arch/arm/cpu/arm720t/tegra20/cpu.c
@@ -29,7 +29,7 @@
 #include <asm/arch/pinmux.h>
 #include <asm/arch/scu.h>
 #include <common.h>
-#include "cpu.h"
+#include "../tegra-common/cpu.h"
 
 /* Returns 1 if the current CPU executing is a Cortex-A9, else 0 */
 int ap20_cpu_is_cortexa9(void)
diff --git a/arch/arm/cpu/arm720t/tegra20/cpu.h b/arch/arm/cpu/arm720t/tegra20/cpu.h
deleted file mode 100644
index 6804cd7a3d..0000000000
--- a/arch/arm/cpu/arm720t/tegra20/cpu.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * (C) Copyright 2010-2011
- * NVIDIA Corporation <www.nvidia.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <asm/types.h>
-
-/* Stabilization delays, in usec */
-#define PLL_STABILIZATION_DELAY (300)
-#define IO_STABILIZATION_DELAY	(1000)
-
-#define NVBL_PLLP_KHZ	(216000)
-
-#define PLLX_ENABLED		(1 << 30)
-#define CCLK_BURST_POLICY	0x20008888
-#define SUPER_CCLK_DIVIDER	0x80000000
-
-/* Calculate clock fractional divider value from ref and target frequencies */
-#define CLK_DIVIDER(REF, FREQ)  ((((REF) * 2) / FREQ) - 2)
-
-/* Calculate clock frequency value from reference and clock divider value */
-#define CLK_FREQUENCY(REF, REG)  (((REF) * 2) / (REG + 2))
-
-/* AVP/CPU ID */
-#define PG_UP_TAG_0_PID_CPU	0x55555555	/* CPU aka "a9" aka "mpcore" */
-#define PG_UP_TAG_0             0x0
-
-#define CORESIGHT_UNLOCK	0xC5ACCE55;
-
-/* AP20-Specific Base Addresses */
-
-/* AP20 Base physical address of SDRAM. */
-#define AP20_BASE_PA_SDRAM      0x00000000
-/* AP20 Base physical address of internal SRAM. */
-#define AP20_BASE_PA_SRAM       0x40000000
-/* AP20 Size of internal SRAM (256KB). */
-#define AP20_BASE_PA_SRAM_SIZE  0x00040000
-/* AP20 Base physical address of flash. */
-#define AP20_BASE_PA_NOR_FLASH  0xD0000000
-/* AP20 Base physical address of boot information table. */
-#define AP20_BASE_PA_BOOT_INFO  AP20_BASE_PA_SRAM
-
-/*
- * Super-temporary stacks for EXTREMELY early startup. The values chosen for
- * these addresses must be valid on ALL SOCs because this value is used before
- * we are able to differentiate between the SOC types.
- *
- * NOTE: The since CPU's stack will eventually be moved from IRAM to SDRAM, its
- *       stack is placed below the AVP stack. Once the CPU stack has been moved,
- *       the AVP is free to use the IRAM the CPU stack previously occupied if
- *       it should need to do so.
- *
- * NOTE: In multi-processor CPU complex configurations, each processor will have
- *       its own stack of size CPU_EARLY_BOOT_STACK_SIZE. CPU 0 will have a
- *       limit of CPU_EARLY_BOOT_STACK_LIMIT. Each successive CPU will have a
- *       stack limit that is CPU_EARLY_BOOT_STACK_SIZE less then the previous
- *       CPU.
- */
-
-/* Common AVP early boot stack limit */
-#define AVP_EARLY_BOOT_STACK_LIMIT	\
-	(AP20_BASE_PA_SRAM + (AP20_BASE_PA_SRAM_SIZE/2))
-/* Common AVP early boot stack size */
-#define AVP_EARLY_BOOT_STACK_SIZE	0x1000
-/* Common CPU early boot stack limit */
-#define CPU_EARLY_BOOT_STACK_LIMIT	\
-	(AVP_EARLY_BOOT_STACK_LIMIT - AVP_EARLY_BOOT_STACK_SIZE)
-/* Common CPU early boot stack size */
-#define CPU_EARLY_BOOT_STACK_SIZE	0x1000
-
-#define EXCEP_VECTOR_CPU_RESET_VECTOR	(NV_PA_EVP_BASE + 0x100)
-#define CSITE_CPU_DBG0_LAR		(NV_PA_CSITE_BASE + 0x10FB0)
-#define CSITE_CPU_DBG1_LAR		(NV_PA_CSITE_BASE + 0x12FB0)
-
-#define FLOW_CTLR_HALT_COP_EVENTS	(NV_PA_FLOW_BASE + 4)
-#define FLOW_MODE_STOP			2
-#define HALT_COP_EVENT_JTAG		(1 << 28)
-#define HALT_COP_EVENT_IRQ_1		(1 << 11)
-#define HALT_COP_EVENT_FIQ_1		(1 << 9)
-
-void start_cpu(u32 reset_vector);
-int ap20_cpu_is_cortexa9(void);
-void halt_avp(void)  __attribute__ ((noreturn));
diff --git a/arch/arm/cpu/arm720t/tegra20/spl.c b/arch/arm/cpu/arm720t/tegra20/spl.c
deleted file mode 100644
index 6c16dce299..0000000000
--- a/arch/arm/cpu/arm720t/tegra20/spl.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * (C) Copyright 2012
- * NVIDIA Inc, <www.nvidia.com>
- *
- * Allen Martin <amartin@nvidia.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <common.h>
-#include <asm/u-boot.h>
-#include <asm/utils.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/clock.h>
-#include <nand.h>
-#include <mmc.h>
-#include <fat.h>
-#include <version.h>
-#include <i2c.h>
-#include <image.h>
-#include <malloc.h>
-#include <linux/compiler.h>
-#include "board.h"
-#include "cpu.h"
-
-#include <asm/io.h>
-#include <asm/arch/tegra20.h>
-#include <asm/arch/clk_rst.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/pmc.h>
-#include <asm/arch/pinmux.h>
-#include <asm/arch/scu.h>
-#include <common.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* Define global data structure pointer to it*/
-static gd_t gdata __attribute__ ((section(".data")));
-static bd_t bdata __attribute__ ((section(".data")));
-
-inline void hang(void)
-{
-	puts("### ERROR ### Please RESET the board ###\n");
-	for (;;)
-		;
-}
-
-void board_init_f(ulong dummy)
-{
-	board_init_uart_f();
-
-	/* Initialize periph GPIOs */
-#ifdef CONFIG_SPI_UART_SWITCH
-	gpio_early_init_uart();
-#else
-	gpio_config_uart();
-#endif
-
-	/*
-	 * We call relocate_code() with relocation target same as the
-	 * CONFIG_SYS_SPL_TEXT_BASE. This will result in relocation getting
-	 * skipped. Instead, only .bss initialization will happen. That's
-	 * all we need
-	 */
-	debug(">>board_init_f()\n");
-	relocate_code(CONFIG_SPL_STACK, &gdata, CONFIG_SPL_TEXT_BASE);
-}
-
-/* This requires UART clocks to be enabled */
-static void preloader_console_init(void)
-{
-	const char *u_boot_rev = U_BOOT_VERSION;
-
-	gd = &gdata;
-	gd->bd = &bdata;
-	gd->flags |= GD_FLG_RELOC;
-	gd->baudrate = CONFIG_BAUDRATE;
-
-	serial_init();		/* serial communications setup */
-
-	gd->have_console = 1;
-
-	/* Avoid a second "U-Boot" coming from this string */
-	u_boot_rev = &u_boot_rev[7];
-
-	printf("\nU-Boot SPL %s (%s - %s)\n", u_boot_rev, U_BOOT_DATE,
-		U_BOOT_TIME);
-}
-
-void board_init_r(gd_t *id, ulong dummy)
-{
-	struct pmux_tri_ctlr *pmt = (struct pmux_tri_ctlr *)NV_PA_APB_MISC_BASE;
-
-	/* enable JTAG */
-	writel(0xC0, &pmt->pmt_cfg_ctl);
-
-	debug(">>spl:board_init_r()\n");
-
-	mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,
-			CONFIG_SYS_SPL_MALLOC_SIZE);
-
-#ifdef CONFIG_SPL_BOARD_INIT
-	spl_board_init();
-#endif
-
-	clock_early_init();
-	serial_init();
-	preloader_console_init();
-
-	start_cpu((u32)CONFIG_SYS_TEXT_BASE);
-	halt_avp();
-	/* not reached */
-}
-
-int board_usb_init(const void *blob)
-{
-	return 0;
-}