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authorSimon Glass <sjg@chromium.org>2017-05-17 08:22:46 -0600
committerTom Rini <trini@konsulko.com>2017-06-05 11:02:31 -0400
commit5a8ba315f1cb259b1022e5d85e4034b9bfb2bea5 (patch)
tree35150d3a39ce3096651e35e18c69eac954c0664d /arch/arm/cpu/arm920t
parent5644aeea8e887903240b784deaa33b3866242d30 (diff)
samsung: Drop more references fo s3c24x0
This is dead code now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/cpu/arm920t')
-rw-r--r--arch/arm/cpu/arm920t/start.S37
1 files changed, 0 insertions, 37 deletions
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 3ada6d026f..3880a402d8 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -50,43 +50,6 @@ copyex:
bne copyex
#endif
-#ifdef CONFIG_S3C24X0
- /* turn off the watchdog */
-
-# if defined(CONFIG_S3C2400)
-# define pWTCON 0x15300000
-# define INTMSK 0x14400008 /* Interrupt-Controller base addresses */
-# define CLKDIVN 0x14800014 /* clock divisor register */
-#else
-# define pWTCON 0x53000000
-# define INTMSK 0x4A000008 /* Interrupt-Controller base addresses */
-# define INTSUBMSK 0x4A00001C
-# define CLKDIVN 0x4C000014 /* clock divisor register */
-# endif
-
- ldr r0, =pWTCON
- mov r1, #0x0
- str r1, [r0]
-
- /*
- * mask all IRQs by setting all bits in the INTMR - default
- */
- mov r1, #0xffffffff
- ldr r0, =INTMSK
- str r1, [r0]
-# if defined(CONFIG_S3C2410)
- ldr r1, =0x3ff
- ldr r0, =INTSUBMSK
- str r1, [r0]
-# endif
-
- /* FCLK:HCLK:PCLK = 1:2:4 */
- /* default FCLK is 120 MHz ! */
- ldr r0, =CLKDIVN
- mov r1, #3
- str r1, [r0]
-#endif /* CONFIG_S3C24X0 */
-
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!