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authorAdam Ford <aford173@gmail.com>2018-08-16 13:23:11 -0500
committerTom Rini <trini@konsulko.com>2018-09-10 21:19:16 -0400
commit93b283d49f933f95f3a6f40762936f454ac655a8 (patch)
tree73100f23d055bae16636df9368a8d4558e459f3a /arch/arm/cpu/arm926ejs/cache.c
parent5f133bb7c519ebb069f74bbda428627ad28419c6 (diff)
ARM: CPU: arm926ejs: Consolidate cache routines to common file
Four different boards had different options for enabling cache that were virtually all the same. This consolidates these common functions into arch/arm/cpu/arm926ejs/cache.c This also has the positive side-effect of enabling cache on the Davinci (da850) boards. Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Add mach-at91 to the list of consolidations] Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/cache.c')
-rw-r--r--arch/arm/cpu/arm926ejs/cache.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
index 3b89391c37..22a55f52e0 100644
--- a/arch/arm/cpu/arm926ejs/cache.c
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -65,3 +65,26 @@ __weak void l2_cache_disable(void) {}
#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
__weak void invalidate_l2_cache(void) {}
#endif
+
+#ifndef CONFIG_SYS_ICACHE_OFF
+/* Invalidate entire I-cache and branch predictor array */
+void invalidate_icache_all(void)
+{
+ unsigned long i = 0;
+
+ asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i));
+}
+#else
+void invalidate_icache_all(void) {}
+#endif
+
+void enable_caches(void)
+{
+#ifndef CONFIG_SYS_ICACHE_OFF
+ icache_enable();
+#endif
+#ifndef CONFIG_SYS_DCACHE_OFF
+ dcache_enable();
+#endif
+}
+