imx: mx25: Remove legacy iomux support

Legacy iomux support is no longer needed now that all boards have been converted
to iomux-v3.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>

1 files changed, 0 insertions, 117 deletions

diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 679273b2b4..7cbbe65784 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -27,7 +27,6 @@
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
-#include <asm/arch/imx25-pinmux.h>
 #include <asm/arch/clock.h>
 
 #ifdef CONFIG_FSL_ESDHC
@@ -248,123 +247,7 @@ int cpu_mmc_init(bd_t *bis)
 }
 #endif
 
-#ifdef CONFIG_MXC_UART
-void mx25_uart1_init_pins(void)
-{
-	struct iomuxc_mux_ctl *muxctl;
-	struct iomuxc_pad_ctl *padctl;
-	u32 inpadctl;
-	u32 outpadctl;
-	u32 muxmode0;
-
-	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
-	padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
-	muxmode0 = MX25_PIN_MUX_MODE(0);
-	/*
-	 * set up input pins with hysteresis and 100K pull-ups
-	 */
-	inpadctl = MX25_PIN_PAD_CTL_HYS
-	    | MX25_PIN_PAD_CTL_PKE
-	    | MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PU;
-
-	/*
-	 * set up output pins with 100K pull-downs
-	 * FIXME: need to revisit this
-	 *      PUE is ignored if PKE is not set
-	 *      so the right value here is likely
-	 *        0x0 for no pull up/down
-	 *      or
-	 *        0xc0 for 100k pull down
-	 */
-	outpadctl = MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD;
-
-	/* UART1 */
-	/* rxd */
-	writel(muxmode0, &muxctl->pad_uart1_rxd);
-	writel(inpadctl, &padctl->pad_uart1_rxd);
-
-	/* txd */
-	writel(muxmode0, &muxctl->pad_uart1_txd);
-	writel(outpadctl, &padctl->pad_uart1_txd);
-
-	/* rts */
-	writel(muxmode0, &muxctl->pad_uart1_rts);
-	writel(outpadctl, &padctl->pad_uart1_rts);
-
-	/* cts */
-	writel(muxmode0, &muxctl->pad_uart1_cts);
-	writel(inpadctl, &padctl->pad_uart1_cts);
-}
-#endif /* CONFIG_MXC_UART */
-
 #ifdef CONFIG_FEC_MXC
-void mx25_fec_init_pins(void)
-{
-	struct iomuxc_mux_ctl *muxctl;
-	struct iomuxc_pad_ctl *padctl;
-	u32 inpadctl_100kpd;
-	u32 inpadctl_22kpu;
-	u32 outpadctl;
-	u32 muxmode0;
-
-	muxctl = (struct iomuxc_mux_ctl *)IMX_IOPADMUX_BASE;
-	padctl = (struct iomuxc_pad_ctl *)IMX_IOPADCTL_BASE;
-	muxmode0 = MX25_PIN_MUX_MODE(0);
-	inpadctl_100kpd = MX25_PIN_PAD_CTL_HYS
-	    | MX25_PIN_PAD_CTL_PKE
-	    | MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD;
-	inpadctl_22kpu = MX25_PIN_PAD_CTL_HYS
-	    | MX25_PIN_PAD_CTL_PKE
-	    | MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_22K_PU;
-	/*
-	 * set up output pins with 100K pull-downs
-	 * FIXME: need to revisit this
-	 *      PUE is ignored if PKE is not set
-	 *      so the right value here is likely
-	 *        0x0 for no pull
-	 *      or
-	 *        0xc0 for 100k pull down
-	 */
-	outpadctl = MX25_PIN_PAD_CTL_PUE | MX25_PIN_PAD_CTL_100K_PD;
-
-	/* FEC_TX_CLK */
-	writel(muxmode0, &muxctl->pad_fec_tx_clk);
-	writel(inpadctl_100kpd, &padctl->pad_fec_tx_clk);
-
-	/* FEC_RX_DV */
-	writel(muxmode0, &muxctl->pad_fec_rx_dv);
-	writel(inpadctl_100kpd, &padctl->pad_fec_rx_dv);
-
-	/* FEC_RDATA0 */
-	writel(muxmode0, &muxctl->pad_fec_rdata0);
-	writel(inpadctl_100kpd, &padctl->pad_fec_rdata0);
-
-	/* FEC_TDATA0 */
-	writel(muxmode0, &muxctl->pad_fec_tdata0);
-	writel(outpadctl, &padctl->pad_fec_tdata0);
-
-	/* FEC_TX_EN */
-	writel(muxmode0, &muxctl->pad_fec_tx_en);
-	writel(outpadctl, &padctl->pad_fec_tx_en);
-
-	/* FEC_MDC */
-	writel(muxmode0, &muxctl->pad_fec_mdc);
-	writel(outpadctl, &padctl->pad_fec_mdc);
-
-	/* FEC_MDIO */
-	writel(muxmode0, &muxctl->pad_fec_mdio);
-	writel(inpadctl_22kpu, &padctl->pad_fec_mdio);
-
-	/* FEC_RDATA1 */
-	writel(muxmode0, &muxctl->pad_fec_rdata1);
-	writel(inpadctl_100kpd, &padctl->pad_fec_rdata1);
-
-	/* FEC_TDATA1 */
-	writel(muxmode0, &muxctl->pad_fec_tdata1);
-	writel(outpadctl, &padctl->pad_fec_tdata1);
-
-}
-
 void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
 {
 	int i;