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| author | Quentin Schulz <quentin.schulz@bootlin.com> | 2018-08-31 16:28:30 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-09-25 21:49:18 -0400 |
| commit | ac47fbee6ddd3cc50869d6e46f24f85ff59a5b0a (patch) | |
| tree | 837320b132e986d8a49c3b71152eea8524ff04a1 /arch/arm/cpu/arm926ejs | |
| parent | 8a4791fa08fb456f9cf8ef95083ddd4e0d07b48e (diff) | |
arm: spear: enable SSP1, 2 and 3 clocks when SPI controller driver is built
SPI controllers SSP1, 2 and 3 require to enable their respective clocks.
Let's enable them only when the SPI controller driver is built.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Diffstat (limited to 'arch/arm/cpu/arm926ejs')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/spear/cpu.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/spear/cpu.c b/arch/arm/cpu/arm926ejs/spear/cpu.c index 88a40c6036..51c4a730f4 100644 --- a/arch/arm/cpu/arm926ejs/spear/cpu.c +++ b/arch/arm/cpu/arm926ejs/spear/cpu.c @@ -52,6 +52,9 @@ int arch_cpu_init(void) #if defined(CONFIG_SPEAR_GPIO) periph1_clken |= MISC_GPIO3ENB | MISC_GPIO4ENB; #endif +#if defined(CONFIG_PL022_SPI) + periph1_clken |= MISC_SSP1ENB | MISC_SSP2ENB | MISC_SSP3ENB; +#endif writel(periph1_clken, &misc_p->periph1_clken); |