diff options
| author | Lokesh Vutla <lokeshvutla@ti.com> | 2013-07-30 10:48:53 +0530 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-08-15 08:51:10 -0400 |
| commit | 95cb69faeb45f6396a1336bff201a50ea1677d85 (patch) | |
| tree | 6eac5c28deb7b60094ccc54ea2a1e22e92722389 /arch/arm/cpu/armv7/am33xx/clock_ti814x.c | |
| parent | 94d77fb656d49f2b0efe2de5605a52c5145d2c3b (diff) | |
ARM: AM33xx: Cleanup clocks layer
Cleaning up the clocks layer.
This helps in addition of new Soc with minimal
changes.
This is derived from OMAP4 boards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'arch/arm/cpu/armv7/am33xx/clock_ti814x.c')
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c index 658772bbe3..965e875575 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_ti814x.c +++ b/arch/arm/cpu/armv7/am33xx/clock_ti814x.c @@ -264,11 +264,6 @@ const struct sata_pll *spll = (struct sata_pll *)SATA_PLL_BASE; */ static void enable_per_clocks(void) { - /* UART0 */ - writel(PRCM_MOD_EN, &cmalwon->uart0clkctrl); - while (readl(&cmalwon->uart0clkctrl) != PRCM_MOD_EN) - ; - /* HSMMC1 */ writel(PRCM_MOD_EN, &cmalwon->mmchs1clkctrl); while (readl(&cmalwon->mmchs1clkctrl) != PRCM_MOD_EN) @@ -455,8 +450,6 @@ void sata_pll_config(void) ; } -void enable_emif_clocks(void) {}; - void enable_dmm_clocks(void) { writel(PRCM_MOD_EN, &cmdef->fwclkctrl); @@ -477,13 +470,19 @@ void enable_dmm_clocks(void) ; } +void setup_clocks_for_console(void) +{ + unlock_pll_control_mmr(); + /* UART0 */ + writel(PRCM_MOD_EN, &cmalwon->uart0clkctrl); + while (readl(&cmalwon->uart0clkctrl) != PRCM_MOD_EN) + ; +} /* * Configure the PLL/PRCM for necessary peripherals */ -void pll_init() +void prcm_init(void) { - unlock_pll_control_mmr(); - /* Enable the control module */ writel(PRCM_MOD_EN, &cmalwon->controlclkctrl); |