diff options
| author | Tom Rini <trini@ti.com> | 2012-05-14 12:38:18 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-07-07 14:07:21 +0200 |
| commit | 2ab281037555de1710aa597531562fe071470198 (patch) | |
| tree | c1338e35ac8b84797182b5e9a44a171f54c57e15 /arch/arm/cpu/armv7/am33xx | |
| parent | d1df0fd37388fe0dc77a75f5aece04f70cc3f7e6 (diff) | |
am33xx: Do not call init_timer twice
We do not need to call init_timer both in SPL and U-Boot itself, just
SPL needs to initialize the timer.
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/am33xx')
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/board.c | 30 |
1 files changed, 16 insertions, 14 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 6b7a494d7c..71309a7f47 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -40,6 +40,22 @@ struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE; #define UART_SMART_IDLE_EN (0x1 << 0x3) #endif +#ifdef CONFIG_SPL_BUILD +/* Initialize timer */ +static void init_timer(void) +{ + /* Reset the Timer */ + writel(0x2, (&timer_base->tscir)); + + /* Wait until the reset is done */ + while (readl(&timer_base->tiocp_cfg) & 1) + ; + + /* Start the Timer */ + writel(0x1, (&timer_base->tclr)); +} +#endif + /* * early system init of muxing and clocks. */ @@ -88,20 +104,6 @@ void s_init(void) enable_mmc0_pin_mux(); } -/* Initialize timer */ -void init_timer(void) -{ - /* Reset the Timer */ - writel(0x2, (&timer_base->tscir)); - - /* Wait until the reset is done */ - while (readl(&timer_base->tiocp_cfg) & 1) - ; - - /* Start the Timer */ - writel(0x1, (&timer_base->tclr)); -} - #if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD) int board_mmc_init(bd_t *bis) { |