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authorAllen Martin <amartin@nvidia.com>2012-12-19 13:02:36 -0800
committerAllen Martin <amartin@nvidia.com>2012-12-19 13:02:36 -0800
commita098cf41fdb2a6607c675f7fe4f3164617c9367e (patch)
treeb37acb36f65909e6f74cc537d73efd883a1485a6 /arch/arm/cpu/armv7/exynos/clock.c
parentb8a7c467960ffb4d5a5e1eef5f7783fb6f594542 (diff)
parent095728803eedfce850a2f85828f79500cb09979e (diff)
Merge remote-tracking branch 'u-boot/master' into u-boot-arm-merged
Conflicts: README arch/arm/cpu/armv7/exynos/clock.c board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
Diffstat (limited to 'arch/arm/cpu/armv7/exynos/clock.c')
-rw-r--r--arch/arm/cpu/armv7/exynos/clock.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
index fe61f88af4..c6c66814e5 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -919,6 +919,20 @@ static int exynos5_set_spi_clk(enum periph_id periph_id,
clrsetbits_le32(reg, mask << pre_shift, (fine & mask) << pre_shift);
return 0;
+
+static unsigned long exynos4_get_i2c_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned long sclk, aclk_100;
+ unsigned int ratio;
+
+ sclk = get_pll_clk(APLL);
+
+ ratio = (readl(&clk->div_top)) >> 4;
+ ratio &= 0xf;
+ aclk_100 = sclk / (ratio + 1);
+ return aclk_100;
}
unsigned long get_pll_clk(int pllreg)
@@ -941,6 +955,8 @@ unsigned long get_i2c_clk(void)
{
if (cpu_is_exynos5()) {
return exynos5_get_i2c_clk();
+ } else if (cpu_is_exynos4()) {
+ return exynos4_get_i2c_clk();
} else {
debug("I2C clock is not set for this CPU\n");
return 0;