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author | Tom Rini <trini@konsulko.com> | 2019-03-15 11:58:17 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2019-03-15 11:58:17 -0400 |
commit | 8303467e80d7059158bf906af58ab8911ca46e44 (patch) | |
tree | 6617e101598bacc5686c22f2f0df440052124aa7 /arch/arm/cpu/armv7/ls102xa/Kconfig | |
parent | 821aa1916ecc5116a6f80bcb8a73e70af5b99f4b (diff) | |
parent | 158097052a6a528408e05d2345ff2ccdbb46036e (diff) |
Merge git://git.denx.de/u-boot-fsl-qoriq
- DPAA2 fixes and DDR errata workaround for LS1021A
Diffstat (limited to 'arch/arm/cpu/armv7/ls102xa/Kconfig')
-rw-r--r-- | arch/arm/cpu/armv7/ls102xa/Kconfig | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 5d6a711c14..94fa68250d 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -4,6 +4,7 @@ config ARCH_LS1021A select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR select SYS_FSL_ERRATUM_A008378 select SYS_FSL_ERRATUM_A008407 + select SYS_FSL_ERRATUM_A008850 select SYS_FSL_ERRATUM_A008997 select SYS_FSL_ERRATUM_A009007 select SYS_FSL_ERRATUM_A009008 @@ -63,6 +64,11 @@ config SYS_CCI400_OFFSET Offset for CCI400 base. CCI400 base addr = CCSRBAR + CCI400_OFFSET +config SYS_FSL_ERRATUM_A008850 + bool + help + Workaround for DDR erratum A008850 + config SYS_FSL_ERRATUM_A008997 bool help |