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authorTom Rini <trini@konsulko.com>2019-10-23 07:55:20 -0400
committerTom Rini <trini@konsulko.com>2019-10-23 07:55:20 -0400
commit0e0b303a67fed4e3830ee32c38033e83a3d7cc8f (patch)
treeddf8f3dc92b5b28807270627bc48ad2d27c58293 /arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
parent44510daea4d07fee736dd90411c4b503340b449e (diff)
parentd20f184ce3a012ab2c0abe4792bc130c238fa5b0 (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add LS1027A, LS1018A, LS1017A support - Few updates related to usb, ls1012a, lx2160a
Diffstat (limited to 'arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c')
-rw-r--r--arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c16
1 files changed, 11 insertions, 5 deletions
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
index bb169aaaf4..df64f5415a 100644
--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
@@ -68,12 +68,18 @@ static void __secure ls1_deepsleep_irq_cfg(void)
ippdexpcr0 = in_be32(&rcpm->ippdexpcr0);
/*
- * Workaround: There is bug of register ippdexpcr1, when read it always
- * returns zero, so its value is saved to a scrachpad register to be
- * read, that is why we don't read it from register ippdexpcr1 itself.
+ * Workaround of errata A-008646
+ * Errata states that read to register ippdexpcr1 always returns
+ * zero irrespective of what value is written into it. So its value
+ * is first saved to a spare register and then read from it
*/
- ippdexpcr1 = in_le32(&scfg->sparecr[7]);
- out_be32(&rcpm->ippdexpcr1, ippdexpcr1);
+ ippdexpcr1 = in_be32(&scfg->sparecr[7]);
+
+ /*
+ * To allow OCRAM to be used as wakeup source in deep sleep,
+ * do not power it down.
+ */
+ out_be32(&rcpm->ippdexpcr1, ippdexpcr1 | RCPM_IPPDEXPCR1_OCRAM1);
if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC)
pmcintecr |= SCFG_PMCINTECR_ETSECRXG0 |