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| author | Peng Fan <Peng.Fan@freescale.com> | 2015-07-20 19:28:24 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2015-08-02 11:05:07 +0200 |
| commit | d73d5aee3c5585e67ece5f6e263259fceaadf890 (patch) | |
| tree | e9ad666d4db8e2969fa3e61c71a73a3545ab785a /arch/arm/cpu/armv7/mx6/clock.c | |
| parent | bc32fc699c18c690cfb9c448a0f6dca1f020d277 (diff) | |
imx: mx6ul Add CONFIG_SYS_CACHELINE_SIZE for i.MX6UL
Since i.MX6UL's cache line size is 64bytes, need to
define the macro CONFIG_SYS_CACHELINE_SIZE to 64 for i.MX6UL.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv7/mx6/clock.c')
0 files changed, 0 insertions, 0 deletions