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authorNikita Kiryanov <nikita@compulab.co.il>2014-08-20 15:08:56 +0300
committerStefano Babic <sbabic@denx.de>2014-09-09 15:35:00 +0200
commit06a51b8cc85ac2cfa501b9f537f5aa1514b7c508 (patch)
tree49ebd84bbfdaff9defcaf9dba0dc426ba80e7a7e /arch/arm/cpu/armv7/mx6/ddr.c
parent3368918f719dffebabd7127504047f5a0fd091b3 (diff)
arm: mx6: ddr: do not write into reserved bit
Bit 16 in mapsr register is in a reserved field. Don't write to it. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Acked-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Diffstat (limited to 'arch/arm/cpu/armv7/mx6/ddr.c')
-rw-r--r--arch/arm/cpu/armv7/mx6/ddr.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
index 5fc4d95746..6e6f3373ac 100644
--- a/arch/arm/cpu/armv7/mx6/ddr.c
+++ b/arch/arm/cpu/armv7/mx6/ddr.c
@@ -472,7 +472,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
1 << 6 | /* BOTH_CS_PD */
(tcksrx & 0x7) << 3 |
(tcksre & 0x7);
- mmdc0->mapsr = 0x00011006; /* ADOPT power down enabled */
+ mmdc0->mapsr = 0x00001006; /* ADOPT power down enabled */
/* Step 11: Configure ZQ calibration: one-time and periodic 1ms */
val = 0xa1390003;