summaryrefslogtreecommitdiff
path: root/arch/arm/cpu/armv7/mx6
diff options
context:
space:
mode:
authorPeng Fan <Peng.Fan@freescale.com>2015-01-15 14:22:32 +0800
committerStefano Babic <sbabic@denx.de>2015-02-17 10:42:53 +0100
commit1f516faa45611aedc8c2e3f303b3866f615d481e (patch)
treea6a1894153196675b626c327c927d667201a6d25 /arch/arm/cpu/armv7/mx6
parente72d344386bf80738fab7a6bd37cb321f443093a (diff)
ARM: imx6: disable bandgap self-bias after boot
The self-bias circuit is used by the bandgap during startup. Once the bandgap has stabilized, the self-bias circuit should be disabled for best noise performance of analog blocks. Also this bit should be disabled before the chip enters STOP mode or when ever the regular bandgap is disabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv7/mx6')
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index e599a12b3a..df4e824355 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -255,6 +255,23 @@ static void clear_mmdc_ch_mask(void)
writel(0, &mxc_ccm->ccdr);
}
+static void init_bandgap(void)
+{
+ struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+ /*
+ * Ensure the bandgap has stabilized.
+ */
+ while (!(readl(&anatop->ana_misc0) & 0x80))
+ ;
+ /*
+ * For best noise performance of the analog blocks using the
+ * outputs of the bandgap, the reftop_selfbiasoff bit should
+ * be set.
+ */
+ writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set);
+}
+
+
#ifdef CONFIG_MX6SL
static void set_preclk_from_osc(void)
{
@@ -275,6 +292,13 @@ int arch_cpu_init(void)
clear_mmdc_ch_mask();
/*
+ * Disable self-bias circuit in the analog bandap.
+ * The self-bias circuit is used by the bandgap during startup.
+ * This bit should be set after the bandgap has initialized.
+ */
+ init_bandgap();
+
+ /*
* When low freq boot is enabled, ROM will not set AHB
* freq, so we need to ensure AHB freq is 132MHz in such
* scenario.