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authorYe.Li <B37916@freescale.com>2015-07-11 11:38:44 +0800
committerStefano Babic <sbabic@denx.de>2015-08-02 10:45:41 +0200
commitec0f9530b134b20c59d7ba8ed862e96a6d223f34 (patch)
tree722c67c67ab4f95fc2614eaf805def1cdd5c951a /arch/arm/cpu/armv7/mx6
parente1c2d68b3958f6aaf20f4ad42ed45de03e22300d (diff)
imx: mx6: hab : Remove the cache issue workaroud in hab for i.MX6QP
Since the i.MX6QP has fixed the issue in boot ROM, so remove the workaround for i.MX6QP. Signed-off-by: Ye.Li <B37916@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/cpu/armv7/mx6')
-rw-r--r--arch/arm/cpu/armv7/mx6/hab.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/mx6/hab.c b/arch/arm/cpu/armv7/mx6/hab.c
index 87f422d039..27cabe477d 100644
--- a/arch/arm/cpu/armv7/mx6/hab.c
+++ b/arch/arm/cpu/armv7/mx6/hab.c
@@ -423,7 +423,8 @@ uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
* do cache flushes. don't think any
* exist, so we ignore them.
*/
- writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
+ if (!is_mx6dqp())
+ writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
} else if (is_cpu_type(MXC_CPU_MX6DL) ||
is_cpu_type(MXC_CPU_MX6SOLO)) {
writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);