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authorPeng Fan <peng.fan@nxp.com>2016-01-28 16:55:07 +0800
committerStefano Babic <sbabic@denx.de>2016-02-21 11:46:26 +0100
commit83703a1ccf2fda45503e161aad7231c82e411034 (patch)
tree1d0194be1858af6c1f5fa2fca760678464f198e0 /arch/arm/cpu/armv7/mx7/soc.c
parent3fe0b104604e267aadc8d9197097421cc02ca103 (diff)
imx: mx7: implement functions to boot auxiliary core
Implement arch_auxiliary_core_up and arch_auxiliary_core_check_up. arch_auxiliary_core_check_up is used to check whether M4 is running or not. arch_auxiliary_core_up is to boot M4 core, the m4 core will use the pc and stack which is set in arch_auxiliary_core_up to set R15 and R13 register and boot. Signed-off-by: Ye.Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv7/mx7/soc.c')
-rw-r--r--arch/arm/cpu/armv7/mx7/soc.c36
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c
index a6ab551a4a..d934b8b385 100644
--- a/arch/arm/cpu/armv7/mx7/soc.c
+++ b/arch/arm/cpu/armv7/mx7/soc.c
@@ -211,6 +211,42 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
}
#endif
+#ifdef CONFIG_IMX_BOOTAUX
+int arch_auxiliary_core_up(u32 core_id, u32 boot_private_data)
+{
+ u32 stack, pc;
+ struct src *src_reg = (struct src *)SRC_BASE_ADDR;
+
+ if (!boot_private_data)
+ return 1;
+
+ stack = *(u32 *)boot_private_data;
+ pc = *(u32 *)(boot_private_data + 4);
+
+ /* Set the stack and pc to M4 bootROM */
+ writel(stack, M4_BOOTROM_BASE_ADDR);
+ writel(pc, M4_BOOTROM_BASE_ADDR + 4);
+
+ /* Enable M4 */
+ clrsetbits_le32(&src_reg->m4rcr, SRC_M4RCR_M4C_NON_SCLR_RST_MASK,
+ SRC_M4RCR_ENABLE_M4_MASK);
+
+ return 0;
+}
+
+int arch_auxiliary_core_check_up(u32 core_id)
+{
+ uint32_t val;
+ struct src *src_reg = (struct src *)SRC_BASE_ADDR;
+
+ val = readl(&src_reg->m4rcr);
+ if (val & 0x00000001)
+ return 0; /* assert in reset */
+
+ return 1;
+}
+#endif
+
void set_wdog_reset(struct wdog_regs *wdog)
{
u32 reg = readw(&wdog->wcr);