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authorLokesh Vutla <lokeshvutla@ti.com>2013-02-12 01:33:45 +0000
committerTom Rini <trini@ti.com>2013-03-11 11:06:11 -0400
commitd4d986ee27fe6a78e50d4789d5b08b87a5e64892 (patch)
tree0bc6adb8e8d303a5512194a6f5cb4a426e678079 /arch/arm/cpu/armv7/omap-common
parent9100edecf8379c357037c34044757202f85480b2 (diff)
ARM: OMAP5: srcomp: enable slew rate compensation cells after powerup
After power-up SRCOMP cells are by-passed by default in OMAP5. Software has to enable these SRCOMP sells. For ES2: All 5 SRCOMP cells needs to be enabled. For ES1: Only 4 SRCOMP cells in core power domain are enabled. The 1 in wkup domain is not enabled because smart i/os of wkup domain work with default compensation code. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@ti.com> Cc: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap-common')
-rw-r--r--arch/arm/cpu/armv7/omap-common/hwinit-common.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
index e5a5eb68d7..60af7eb9b0 100644
--- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
@@ -33,6 +33,7 @@
#include <asm/sizes.h>
#include <asm/emif.h>
#include <asm/omap_common.h>
+#include <linux/compiler.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -100,6 +101,10 @@ void spl_display_print(void)
}
#endif
+void __weak srcomp_enable(void)
+{
+}
+
/*
* Routine: s_init
* Description: Does early system init of watchdog, muxing, andclocks
@@ -126,6 +131,7 @@ void s_init(void)
watchdog_init();
set_mux_conf_regs();
#ifdef CONFIG_SPL_BUILD
+ srcomp_enable();
setup_clocks_for_console();
gd = &gdata;