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| author | Stefano Babic <sbabic@denx.de> | 2015-07-10 09:21:44 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2015-07-10 09:21:44 +0200 |
| commit | 1254ff97abb7606ccd0d7bdcd9f22581c50fe535 (patch) | |
| tree | 61b31e61173154abd38aaa6584e84ea77314b861 /arch/arm/cpu/armv7/omap5/hw_data.c | |
| parent | 54e0f96f764f662be186baae7d6c2c97423bc29d (diff) | |
| parent | f3edfd30541d6f245d7dfa6fa7354cc916cc53e1 (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot
Diffstat (limited to 'arch/arm/cpu/armv7/omap5/hw_data.c')
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/hw_data.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 868415d038..3a723cace7 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -534,6 +534,9 @@ void enable_basic_clocks(void) void enable_basic_uboot_clocks(void) { u32 const clk_domains_essential[] = { +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) + (*prcm)->cm_ipu_clkstctrl, +#endif 0 }; @@ -547,7 +550,11 @@ void enable_basic_uboot_clocks(void) (*prcm)->cm_l4per_i2c2_clkctrl, (*prcm)->cm_l4per_i2c3_clkctrl, (*prcm)->cm_l4per_i2c4_clkctrl, +#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) + (*prcm)->cm_ipu_i2c5_clkctrl, +#else (*prcm)->cm_l4per_i2c5_clkctrl, +#endif (*prcm)->cm_l3init_hsusbhost_clkctrl, (*prcm)->cm_l3init_fsusb_clkctrl, 0 @@ -592,8 +599,8 @@ const struct ctrl_ioregs ioregs_dra7xx_es1 = { .ctrl_ddrch = 0x40404040, .ctrl_lpddr2ch = 0x40404040, .ctrl_ddr3ch = 0x80808080, - .ctrl_ddrio_0 = 0xA2084210, - .ctrl_ddrio_1 = 0x84210840, + .ctrl_ddrio_0 = 0x00094A40, + .ctrl_ddrio_1 = 0x04A52000, .ctrl_ddrio_2 = 0x84210000, .ctrl_emif_sdram_config_ext = 0x0001C1A7, .ctrl_emif_sdram_config_ext_final = 0x0001C1A7, @@ -604,8 +611,8 @@ const struct ctrl_ioregs ioregs_dra72x_es1 = { .ctrl_ddrch = 0x40404040, .ctrl_lpddr2ch = 0x40404040, .ctrl_ddr3ch = 0x60606080, - .ctrl_ddrio_0 = 0xA2084210, - .ctrl_ddrio_1 = 0x84210840, + .ctrl_ddrio_0 = 0x00094A40, + .ctrl_ddrio_1 = 0x04A52000, .ctrl_ddrio_2 = 0x84210000, .ctrl_emif_sdram_config_ext = 0x0001C1A7, .ctrl_emif_sdram_config_ext_final = 0x0001C1A7, |