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authorWolfgang Denk <wd@denx.de>2011-06-01 22:04:12 +0200
committerWolfgang Denk <wd@denx.de>2011-06-01 22:04:12 +0200
commit033cd2c42bf335d3b96e9612695f6c30b83dce2b (patch)
tree1bc9e1d9163cd3114bfeb016d4f4311fbbbec491 /arch/arm/cpu/armv7/s5pc2xx/clock.c
parent2130b03309dcf56dab11b6fd0be3b4bedc7f628c (diff)
parentcd3af8b56749b3200cd858b5a9424c6661958e5f (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: SMDKV310: Fix incorrect conditional compilation for MIU linear mapping SMDKV310: CPU fequency and mmc_pre_ratio modified armv7: Add support for ST-Ericsson U8500 href platform I2C: Add driver for ST-Ericsson U8500 i2c armv7: Add ST-Ericsson u8500 arch Kirkwood: boards cleanup for deprecated CONFIG_CMD_AUTOSCRIPT ARMV7: Vexpress: Add missing MMC header arm/km: update mgcoge3un board support mvgbe: enable configurability of PORT_SERIAL_CONTROL_VALUE arm/km: rename mgcoge2un to mgcoge3un arm/km: add second serial interface for kirkwood arm/km: disable ls (through jffs2 support) arm/km: introduce bootcount env variable and clean km_arm arm/km: move CONFIG_EXTRA_ENV_SETTINGS from board to km_arm file arm/km: remove CONFIG_SYS_KWD_CONFIG from keymile-common.h ARMV7: MMC SPL Boot support for SMDKV310 board ARMV7: Add support for Samsung SMDKV310 Board S5PC2XX: clock: support pwm clock for evt1 (cpu revision 1) S5P: add set_mmc_clk for external clock control S5PC2XX: Support the cpu revision S5P:SROM config code moved to s5p-common directory Add _end for the end of u-boot image for SMDK6400 MMC S5P: Fix typo S5P: GPIO Macro Values Corrected. SMDK2410: various cleanup/code style fixes SMDK2410: use the CFI driver (and remove the old one) SMDK2410: remove unneeded config.mk SMDK2410: activate ARM relocation feature BeagleBoard: fixed typo in typecast mvsata: issue hard reset on initialization VCMA9: use ARM relocation feature to fix build error MX31: drop warnings due to missing prototype for mxc_watchdog_reset() MX5: drop config.mk from efikamx board MX31: Make get_reset_cause() static and drop unreachable code MX53: Remove CONFIG_SYS_BOOTMAPSZ from mx53 config files. MX53: Handle silicon revision 2.1 case mx5: board: code clean up for checkboard code MX51: vision2: Fix build for vision2 board. MX51: vision: Let video mode struct be independant of watchdog. MX53: Add initial support for MX53SMD board. MX53: support for freescale MX53LOCO board mx5: Fix CONFIG_OF_LIBFDT redefined warning mx5: Remove unnecessary CONFIG_SYS_BOOTMAPSZ definition mx31pdk: Clean up mx31pdk.h file
Diffstat (limited to 'arch/arm/cpu/armv7/s5pc2xx/clock.c')
-rw-r--r--arch/arm/cpu/armv7/s5pc2xx/clock.c76
1 files changed, 57 insertions, 19 deletions
diff --git a/arch/arm/cpu/armv7/s5pc2xx/clock.c b/arch/arm/cpu/armv7/s5pc2xx/clock.c
index 450a630486..5ecd475964 100644
--- a/arch/arm/cpu/armv7/s5pc2xx/clock.c
+++ b/arch/arm/cpu/armv7/s5pc2xx/clock.c
@@ -124,29 +124,35 @@ static unsigned long s5pc210_get_pwm_clk(void)
unsigned int sel;
unsigned int ratio;
- /*
- * CLK_SRC_PERIL0
- * PWM_SEL [27:24]
- */
- sel = readl(&clk->src_peril0);
- sel = (sel >> 24) & 0xf;
+ if (s5p_get_cpu_rev() == 0) {
+ /*
+ * CLK_SRC_PERIL0
+ * PWM_SEL [27:24]
+ */
+ sel = readl(&clk->src_peril0);
+ sel = (sel >> 24) & 0xf;
- if (sel == 0x6)
+ if (sel == 0x6)
+ sclk = get_pll_clk(MPLL);
+ else if (sel == 0x7)
+ sclk = get_pll_clk(EPLL);
+ else if (sel == 0x8)
+ sclk = get_pll_clk(VPLL);
+ else
+ return 0;
+
+ /*
+ * CLK_DIV_PERIL3
+ * PWM_RATIO [3:0]
+ */
+ ratio = readl(&clk->div_peril3);
+ ratio = ratio & 0xf;
+ } else if (s5p_get_cpu_rev() == 1) {
sclk = get_pll_clk(MPLL);
- else if (sel == 0x7)
- sclk = get_pll_clk(EPLL);
- else if (sel == 0x8)
- sclk = get_pll_clk(VPLL);
- else
+ ratio = 8;
+ } else
return 0;
- /*
- * CLK_DIV_PERIL3
- * PWM_RATIO [3:0]
- */
- ratio = readl(&clk->div_peril3);
- ratio = ratio & 0xf;
-
pclk = sclk / (ratio + 1);
return pclk;
@@ -199,6 +205,33 @@ static unsigned long s5pc210_get_uart_clk(int dev_index)
return uclk;
}
+/* s5pc210: set the mmc clock */
+static void s5pc210_set_mmc_clk(int dev_index, unsigned int div)
+{
+ struct s5pc210_clock *clk =
+ (struct s5pc210_clock *)samsung_get_base_clock();
+ unsigned int addr;
+ unsigned int val;
+
+ /*
+ * CLK_DIV_FSYS1
+ * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
+ * CLK_DIV_FSYS2
+ * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
+ */
+ if (dev_index < 2) {
+ addr = (unsigned int)&clk->div_fsys1;
+ } else {
+ addr = (unsigned int)&clk->div_fsys2;
+ dev_index -= 2;
+ }
+
+ val = readl(addr);
+ val &= ~(0xff << ((dev_index << 4) + 8));
+ val |= (div & 0xff) << ((dev_index << 4) + 8);
+ writel(val, addr);
+}
+
unsigned long get_pll_clk(int pllreg)
{
return s5pc210_get_pll_clk(pllreg);
@@ -218,3 +251,8 @@ unsigned long get_uart_clk(int dev_index)
{
return s5pc210_get_uart_clk(dev_index);
}
+
+void set_mmc_clk(int dev_index, unsigned int div)
+{
+ s5pc210_set_mmc_clk(dev_index, div);
+}