diff options
| author | Vikas Manocha <vikas.manocha@st.com> | 2015-07-02 18:29:40 -0700 |
|---|---|---|
| committer | Jagan Teki <jteki@openedev.com> | 2015-07-03 13:50:53 +0530 |
| commit | 54afb5002514f88c41f3d462d1e14715a40f4107 (patch) | |
| tree | 71eeed9270b7371134410e92702d02d5b6d8c81e /arch/arm/cpu/armv7/stv0991/clock.c | |
| parent | f59fa3b1811370f979c80f46d839a09f60c49e43 (diff) | |
stv0991: configure clock & pad muxing for qspi
stv0991 has cadence qspi controller for flash interfacing, this
patch configures the device pads & clock for the controller.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Jagannadh Teki <jteki@openedev.com>
Diffstat (limited to 'arch/arm/cpu/armv7/stv0991/clock.c')
| -rw-r--r-- | arch/arm/cpu/armv7/stv0991/clock.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/stv0991/clock.c b/arch/arm/cpu/armv7/stv0991/clock.c index 70b8a8d984..26c0d3637d 100644 --- a/arch/arm/cpu/armv7/stv0991/clock.c +++ b/arch/arm/cpu/armv7/stv0991/clock.c @@ -33,7 +33,9 @@ void clock_setup(int peripheral) /* Clock selection for ethernet tx_clk & rx_clk*/ writel((readl(&stv0991_cgu_regs->eth_ctrl) & ETH_CLK_MASK) | ETH_CLK_CTRL, &stv0991_cgu_regs->eth_ctrl); - + break; + case QSPI_CLOCK_CFG: + writel(QSPI_CLK_CTRL, &stv0991_cgu_regs->qspi_freq); break; default: break; |